BCAX Bit clear and exclusive-OR This instruction performs a bitwise AND of the 128-bit vector in a source SIMD&FP register and the complement of the vector in another source SIMD&FP register, then performs a bitwise exclusive-OR of the resulting vector and the vector in a third source SIMD&FP register, and writes the result to the destination SIMD&FP register. This instruction is a data-independent-time instruction as described in About PSTATE.DIT. 1 1 0 0 1 1 1 0 0 0 1 0 BCAX <Vd>.16B, <Vn>.16B, <Vm>.16B, <Va>.16B if !IsFeatureImplemented(FEAT_SHA3) then EndOfDecode(Decode_UNDEF); end; let d : integer{} = UInt(Rd); let n : integer{} = UInt(Rn); let m : integer{} = UInt(Rm); let a : integer{} = UInt(Ra); <Vd> Is the name of the SIMD&FP destination register, encoded in the "Rd" field. <Vn> Is the name of the first SIMD&FP source register, encoded in the "Rn" field. <Vm> Is the name of the second SIMD&FP source register, encoded in the "Rm" field. <Va> Is the name of the third SIMD&FP source register, encoded in the "Ra" field. AArch64_CheckFPAdvSIMDEnabled(); let operand1 : bits(128) = V{}(m); let operand2 : bits(128) = V{}(n); let operand3 : bits(128) = V{}(a); V{128}(d) = operand2 XOR (operand1 AND NOT(operand3)); 2026-03-12 12:23:09 2025-09_rel_asl1