IRG Insert random tag This instruction inserts a random Logical Address Tag into the address in the first source register, and writes the result to the destination register. Any tags specified in the optional second source register or in GCR_EL1.Exclude are excluded from the selection of the random Logical Address Tag. 1 0 0 1 1 0 1 0 1 1 0 0 0 0 1 0 0 IRG <Xd|SP>, <Xn|SP>{, <Xm>} if !IsFeatureImplemented(FEAT_MTE) then EndOfDecode(Decode_UNDEF); end; let d : integer{} = UInt(Rd); let n : integer{} = UInt(Rn); let m : integer{} = UInt(Rm); <Xd|SP> Is the 64-bit name of the destination general-purpose register or stack pointer, encoded in the "Rd" field. <Xn|SP> Is the 64-bit name of the first source general-purpose register or stack pointer, encoded in the "Rn" field. <Xm> Is the 64-bit name of the second general-purpose source register, encoded in the "Rm" field. Defaults to XZR if absent. let operand : bits(64) = if n == 31 then SP{64}() else X{64}(n); let exclude_reg : bits(64) = X{}(m); let exclude : bits(16) = exclude_reg[15:0] OR GCR_EL1().Exclude; let rtag : bits(4) = AArch64_ChooseTagOrZero(exclude); let result : bits(64) = AArch64_AddressWithAllocationTag(operand, rtag); if d == 31 then SP{64}() = result; else X{64}(d) = result; end; 2026-03-12 12:23:09 2025-09_rel_asl1