Multi-vector accumulate to ZA array vectors. Multi-vector add by vector to ZA array vectors. Multi-vector add to ZA array vectors. Multi-vector add by vector to multi-vector. Add horizontally vector elements to ZA tile. Add multiple of Streaming SVE predicate register size to scalar register. Add multiple of Streaming SVE vector register size to scalar register. Add vertically vector elements to ZA tile. Multi-vector 8-bit floating-point convert to BFloat16. Multi-vector 8-bit floating-point convert to deinterleaved BFloat16. Multi-vector BFloat16 accumulate to ZA array vectors. Multi-vector BFloat16 clamp to minimum/maximum number. Multi-vector BFloat16 convert to 8-bit floating-point. Multi-vector single-precision convert to BFloat16. Multi-vector single-precision convert to interleaved BFloat16. Multi-vector BFloat16 dot product by indexed element to single-precision. Multi-vector BFloat16 dot product by vector to single-precision. Multi-vector BFloat16 dot product to single-precision. Multi-vector BFloat16 maximum by vector. Multi-vector BFloat16 maximum. Multi-vector BFloat16 maximum number by vector. Multi-vector BFloat16 maximum number. Multi-vector BFloat16 minimum by vector. Multi-vector BFloat16 minimum. Multi-vector BFloat16 minimum number by vector. Multi-vector BFloat16 minimum number. Multi-vector BFloat16 fused multiply-add by indexed element. Multi-vector BFloat16 fused multiply-add by vector. Multi-vector BFloat16 fused multiply-add. Multi-vector BFloat16 multiply-add by indexed element to single-precision. Multi-vector BFloat16 multiply-add by vector to single-precision. Multi-vector BFloat16 multiply-add to single-precision. Multi-vector BFloat16 fused multiply-subtract by indexed element. Multi-vector BFloat16 fused multiply-subtract by vector. Multi-vector BFloat16 fused multiply-subtract. Multi-vector BFloat16 multiply-subtract by indexed element from single-precision. Multi-vector BFloat16 multiply-subtract by vector from single-precision. Multi-vector BFloat16 multiply-subtract from single-precision. BFloat16 quarter-tile outer product, accumulating. BFloat16 quarter-tile sum of outer products to single-precision, accumulating. BFloat16 quarter-tile outer product, subtracting. BFloat16 quarter-tile sum of outer products to single-precision, subtracting. BFloat16 outer product, accumulating. BFloat16 sum of outer products to single-precision, accumulating. BFloat16 outer product, subtracting. BFloat16 sum of outer products to single-precision, subtracting. Multi-vector BFloat16 multiply by vector. Multi-vector BFloat16 multiply. Multi-vector BFloat16 adjust exponent by vector. Multi-vector BFloat16 adjust exponent. Multi-vector BFloat16 subtract from ZA array vectors. BFloat16 sparse outer product, accumulating. BFloat16 sparse sum of outer products to single-precision, accumulating. Multi-vector BFloat16 vertical dot product by indexed element to single-precision. Bitwise exclusive NOR population count outer product, accumulating. Bitwise exclusive NOR population count outer product, subtracting. Multi-vector 8-bit floating-point convert to half-precision. Multi-vector 8-bit floating-point convert to deinterleaved half-precision. Multi-vector floating-point accumulate to ZA array vectors. Multi-vector floating-point absolute maximum. Multi-vector floating-point absolute minimum. Multi-vector floating-point clamp to minimum/maximum number. Multi-vector half-precision convert to 8-bit floating-point. Multi-vector single-precision convert to half-precision. Multi-vector single-precision convert to 8-bit floating-point. Multi-vector half-precision convert to single-precision. Multi-vector half-precision convert to deinterleaved single-precision. Multi-vector single-precision convert to interleaved half-precision. Multi-vector single-precision convert to interleaved 8-bit floating-point. Multi-vector single-precision convert to signed 32-bit integer, rounding toward zero. Multi-vector single-precision convert to unsigned 32-bit integer, rounding toward zero. Multi-vector half-precision dot product by indexed element to single-precision. Multi-vector 8-bit floating-point dot product by indexed element to half-precision. Multi-vector half-precision dot product by vector to single-precision. Multi-vector 8-bit floating-point dot product by vector to half-precision. Multi-vector half-precision dot product to single-precision. Multi-vector 8-bit floating-point dot product to half-precision. Multi-vector 8-bit floating-point dot product by indexed element to single-precision. Multi-vector 8-bit floating-point dot product by vector to single-precision. Multi-vector 8-bit floating-point dot product to single-precision. Multi-vector floating-point maximum by vector. Multi-vector floating-point maximum. Multi-vector floating-point maximum number by vector. Multi-vector floating-point maximum number. Multi-vector floating-point minimum by vector. Multi-vector floating-point minimum. Multi-vector floating-point minimum number by vector. Multi-vector floating-point minimum number. Multi-vector floating-point fused multiply-add by indexed element. Multi-vector floating-point fused multiply-add by vector. Multi-vector floating-point fused multiply-add. Multi-vector half-precision multiply-add by indexed element to single-precision. Multi-vector 8-bit floating-point multiply-add by indexed element to half-precision. Multi-vector half-precision multiply-add by vector to single-precision. Multi-vector 8-bit floating-point multiply-add by vector to half-precision. Multi-vector half-precision multiply-add to single-precision. Multi-vector 8-bit floating-point multiply-add to half-precision. Multi-vector 8-bit floating-point multiply-add by indexed element to single-precision. Multi-vector 8-bit floating-point multiply-add by vector to single-precision. Multi-vector 8-bit floating-point multiply-add to single-precision. Multi-vector floating-point fused multiply-subtract by indexed element. Multi-vector floating-point fused multiply-subtract by vector. Multi-vector floating-point fused multiply-subtract. Multi-vector half-precision multiply-subtract by indexed element from single-precision. Multi-vector half-precision multiply-subtract by vector from single-precision. Multi-vector half-precision multiply-subtract from single-precision. Floating-point quarter-tile outer product, accumulating. Half-precision quarter-tile sum of outer products to single-precision, accumulating. 8-bit floating-point quarter-tile sum of outer products to half-precision, accumulating. 8-bit floating-point quarter-tile sum of outer products to single-precision, accumulating. Floating-point quarter-tile outer product, subtracting. Half-precision quarter-tile sum of outer products to single-precision, subtracting. Floating-point outer product, accumulating. Half-precision sum of outer products to single-precision, accumulating. 8-bit floating-point sum of outer products to half-precision, accumulating. 8-bit floating-point sum of outer products to single-precision, accumulating. Floating-point outer product, subtracting. Half-precision sum of outer products to single-precision, subtracting. Multi-vector floating-point multiply by vector. Multi-vector floating-point multiply. Multi-vector single-precision round to integral value, to nearest with ties away from zero. Multi-vector single-precision round to integral value, toward minus Infinity. Multi-vector single-precision round to integral value, to nearest with ties to even. Multi-vector single-precision round to integral value, toward plus Infinity. Multi-vector floating-point adjust exponent by vector. Multi-vector floating-point adjust exponent. Multi-vector floating-point subtract from ZA array vectors. Floating-point sparse outer product, accumulating. Half-precision sparse sum of outer products to single-precision, accumulating. 8-bit floating-point sparse sum of outer products to half-precision, accumulating. 8-bit floating-point sparse sum of outer products to single-precision, accumulating. Multi-vector half-precision vertical dot product by indexed element to single-precision. Multi-vector 8-bit floating-point vertical dot product by indexed element to half-precision. Multi-vector 8-bit floating-point vertical dot product by indexed element to single-precision (bottom). Multi-vector 8-bit floating-point vertical dot product by indexed element to single-precision (top). Contiguous load of bytes to multiple strided vectors (immediate index). Contiguous load of bytes to multiple strided vectors (scalar index). Contiguous load of bytes to 8-bit element ZA tile slice. Contiguous load of doublewords to multiple strided vectors (immediate index). Contiguous load of doublewords to multiple strided vectors (scalar index). Contiguous load of doublewords to 64-bit element ZA tile slice. Contiguous load of halfwords to multiple strided vectors (immediate index). Contiguous load of halfwords to multiple strided vectors (scalar index). Contiguous load of halfwords to 16-bit element ZA tile slice. Contiguous load of quadwords to 128-bit element ZA tile slice. Contiguous load of words to multiple strided vectors (immediate index). Contiguous load of words to multiple strided vectors (scalar index). Contiguous load of words to 32-bit element ZA tile slice. Contiguous load non-temporal of bytes to multiple strided vectors (immediate index). Contiguous load non-temporal of bytes to multiple strided vectors (scalar index). Contiguous load non-temporal of doublewords to multiple strided vectors (immediate index). Contiguous load non-temporal of doublewords to multiple strided vectors (scalar index). Contiguous load non-temporal of halfwords to multiple strided vectors (immediate index). Contiguous load non-temporal of halfwords to multiple strided vectors (scalar index). Contiguous load non-temporal of words to multiple strided vectors (immediate index). Contiguous load non-temporal of words to multiple strided vectors (scalar index). Load ZA array vector. Load ZT0 register. Lookup table read with 2-bit indexes (four registers). Lookup table read with 2-bit indexes (single). Lookup table read with 2-bit indexes (two registers). Lookup table read with 4-bit indexes (four registers). Lookup table read with 4-bit indexes and 8-bit elements (four registers). Lookup table read with 4-bit indexes (single). Lookup table read with 4-bit indexes (two registers). Move four ZA single-vector groups to Z four-vector operand: an alias of MOVA (array to vector, four registers). Move two ZA single-vector groups to Z two-vector operand: an alias of MOVA (array to vector, two registers). Move ZA four-slice operand to Z four-vector operand: an alias of MOVA (tile to vector, four registers). Move ZA tile slice to Z vector: an alias of MOVA (tile to vector, single). Move ZA two-slice operand to Z two-vector operand: an alias of MOVA (tile to vector, two registers). Move Z four-vector operand to four ZA single-vector groups: an alias of MOVA (vector to array, four registers). Move Z two-vector operand to two ZA single-vector groups: an alias of MOVA (vector to array, two registers). Move Z four-vector operand to ZA four-slice operand: an alias of MOVA (vector to tile, four registers). Move Z vector to ZA tile slice: an alias of MOVA (vector to tile, single). Move Z two-vector operand to ZA two-slice operand: an alias of MOVA (vector to tile, two registers). Move four ZA single-vector groups to Z four-vector operand. Move two ZA single-vector groups to Z two-vector operand. Move ZA four-slice operand to Z four-vector operand. Move ZA tile slice to Z vector. Move ZA two-slice operand to Z two-vector operand. Move Z four-vector operand to four ZA single-vector groups. Move Z two-vector operand to two ZA single-vector groups. Move Z four-vector operand to ZA four-slice operand. Move Z vector to ZA tile slice. Move Z two-vector operand to ZA two-slice operand. Move and zero four ZA single-vector groups to Z four-vector operand. Move and zero two ZA single-vector groups to Z two-vector operand. Move and zero ZA four-slice operand to Z four-vector operand. Move and zero ZA tile slice to Z vector. Move and zero ZA two-slice operand to Z two-vector operand. Move 8 bytes from general-purpose register to ZT0. Move 8 bytes from ZT0 to general-purpose register. Move vector register to ZT0. Read multiple of Streaming SVE vector register size to scalar register. Multi-vector signed clamp to minimum/maximum. Multi-vector signed 32-bit integer convert to single-precision. Multi-vector signed 16-bit integer dot product by indexed element to 32-bit integer. Multi-vector signed 16-bit integer dot product by vector to 32-bit integer. Multi-vector signed 16-bit integer dot product to 32-bit integer. Multi-vector signed integer dot product by indexed element. Multi-vector signed integer dot product by vector. Multi-vector signed integer dot product. Multi-vector conditional select. Multi-vector signed maximum by vector. Multi-vector signed maximum. Multi-vector signed minimum by vector. Multi-vector signed minimum. Multi-vector signed 16-bit integer multiply-add by indexed element to 32-bit integer. Multi-vector signed 16-bit integer multiply-add by vector to 32-bit integer. Multi-vector signed 16-bit integer multiply-add to 32-bit integer. Multi-vector signed integer multiply-add long long by indexed element. Multi-vector signed integer multiply-add long long by vector. Multi-vector signed integer multiply-add long long. Multi-vector signed 16-bit integer multiply-subtract by indexed element from 32-bit integer. Multi-vector signed 16-bit integer multiply-subtract by vector from 32-bit integer. Multi-vector signed 16-bit integer multiply-subtract from 32-bit integer. Multi-vector signed integer multiply-subtract long long by indexed element. Multi-vector signed integer multiply-subtract long long by vector. Multi-vector signed integer multiply-subtract long long. Signed 16-bit integer quarter-tile sum of outer products to 32-bit integer, accumulating. Signed integer quarter-tile sum of outer products, accumulating. Signed 16-bit integer quarter-tile sum of outer products to 32-bit integer, subtracting. Signed integer quarter-tile sum of outer products, subtracting. Signed 16-bit integer sum of outer products to 32-bit integer, accumulating. Signed integer sum of outer products, accumulating. Signed 16-bit integer sum of outer products to 32-bit integer, subtracting. Signed integer sum of outer products, subtracting. Multi-vector signed saturating extract narrow. Multi-vector signed 32-bit integer saturating extract narrow to 16-bit integer. Multi-vector signed saturating extract narrow to interleaved integer. Multi-vector signed saturating extract narrow to unsigned integer. Multi-vector signed 32-bit integer saturating extract narrow to unsigned 16-bit integer. Multi-vector signed saturating extract narrow to interleaved unsigned integer. Multi-vector signed saturating doubling multiply high by vector. Multi-vector signed saturating doubling multiply high. Multi-vector signed saturating rounding shift right narrow by immediate. Multi-vector signed 32-bit integer saturating rounding shift right narrow by immediate to 16-bit integer. Multi-vector signed saturating rounding shift right narrow by immediate to interleaved integer. Multi-vector signed saturating rounding shift right narrow by immediate to unsigned integer. Multi-vector signed 32-bit integer saturating rounding shift right narrow by immediate to unsigned 16-bit integer. Multi-vector signed saturating rounding shift right narrow by immediate to interleaved unsigned integer. Multi-vector signed rounding shift left by vector. Multi-vector signed rounding shift left. Contiguous store of bytes from multiple strided vectors (immediate index). Contiguous store of bytes from multiple strided vectors (scalar index). Contiguous store of bytes from 8-bit element ZA tile slice. Contiguous store of doublewords from multiple strided vectors (immediate index). Contiguous store of doublewords from multiple strided vectors (scalar index). Contiguous store of doublewords from 64-bit element ZA tile slice. Contiguous store of halfwords from multiple strided vectors (immediate index). Contiguous store of halfwords from multiple strided vectors (scalar index). Contiguous store of halfwords from 16-bit element ZA tile slice. Contiguous store of quadwords from 128-bit element ZA tile slice. Contiguous store of words from multiple strided vectors (immediate index). Contiguous store of words from multiple strided vectors (scalar index). Contiguous store of words from 32-bit element ZA tile slice. Signed 16-bit integer sparse sum of outer products to 32-bit integer, accumulating. Signed 8-bit integer sparse sum of outer products to 32-bit integer, accumulating. Contiguous store non-temporal of bytes from multiple strided vectors (immediate index). Contiguous store non-temporal of bytes from multiple strided vectors (scalar index). Contiguous store non-temporal of doublewords from multiple strided vectors (immediate index). Contiguous store non-temporal of doublewords from multiple strided vectors (scalar index). Contiguous store non-temporal of halfwords from multiple strided vectors (immediate index). Contiguous store non-temporal of halfwords from multiple strided vectors (scalar index). Contiguous store non-temporal of words from multiple strided vectors (immediate index). Contiguous store non-temporal of words from multiple strided vectors (scalar index). Store ZA array vector. Store ZT0 register. Multi-vector subtract from ZA array vectors. Multi-vector subtract by vector to ZA array vectors. Multi-vector subtract to ZA array vectors. Multi-vector signed by unsigned 8-bit integer dot product by indexed elements to 32-bit integer. Multi-vector signed by unsigned 8-bit integer dot product by vector to 32-bit integer. Multi-vector signed by unsigned 8-bit integer multiply-add by indexed element to 32-bit integer. Multi-vector signed by unsigned 8-bit integer multiply-add by vector to 32-bit integer. Signed by unsigned integer quarter-tile sum of outer products, accumulating. Signed by unsigned integer quarter-tile sum of outer products, subtracting. Signed by unsigned integer sum of outer products, accumulating. Signed by unsigned integer sum of outer products, subtracting. Unpack and sign-extend multi-vector elements. Signed by unsigned 8-bit integer sparse sum of outer products to 32-bit integer, accumulating. Multi-vector signed by unsigned 8-bit integer vertical dot product by indexed element to 32-bit integer. Multi-vector signed 16-bit integer vertical dot product by indexed element to 32-bit integer. Multi-vector signed integer vertical dot product by indexed element. Multi-vector unsigned clamp to minimum/maximum. Multi-vector unsigned 32-bit integer convert to single-precision. Multi-vector unsigned 16-bit integer dot product by indexed element to 32-bit integer. Multi-vector unsigned 16-bit integer dot product by vector to 32-bit integer. Multi-vector unsigned 16-bit integer dot product to 32-bit integer. Multi-vector unsigned integer dot product by indexed element. Multi-vector unsigned integer dot product by vector. Multi-vector unsigned integer dot product. Multi-vector unsigned maximum by vector. Multi-vector unsigned maximum. Multi-vector unsigned minimum by vector. Multi-vector unsigned minimum. Multi-vector unsigned 16-bit integer multiply-add by indexed element to 32-bit integer. Multi-vector unsigned 16-bit integer multiply-add by vector to 32-bit integer. Multi-vector unsigned 16-bit integer multiply-add to 32-bit integer. Multi-vector unsigned integer multiply-add long long by indexed element. Multi-vector unsigned integer multiply-add long long by vector. Multi-vector unsigned integer multiply-add long long. Multi-vector unsigned 16-bit integer multiply-subtract by indexed element from 32-bit integer. Multi-vector unsigned 16-bit integer multiply-subtract by vector from 32-bit integer. Multi-vector unsigned 16-bit integer multiply-subtract from 32-bit integer. Multi-vector unsigned integer multiply-subtract long long by indexed element. Multi-vector unsigned integer multiply-subtract long long by vector. Multi-vector unsigned integer multiply-subtract long long. Unsigned 16-bit integer quarter-tile sum of outer products to 32-bit integer, accumulating. Unsigned integer quarter-tile sum of outer products, accumulating. Unsigned 16-bit integer quarter-tile sum of outer products to 32-bit integer, subtracting. Unsigned integer quarter-tile sum of outer products, subtracting. Unsigned 16-bit integer sum of outer products to 32-bit integer, accumulating. Unsigned integer sum of outer products, accumulating. Unsigned 16-bit integer sum of outer products to 32-bit integer, subtracting. Unsigned integer sum of outer products, subtracting. Multi-vector unsigned saturating extract narrow. Multi-vector unsigned 32-bit integer saturating extract narrow to 16-bit integer. Multi-vector unsigned saturating extract narrow to interleaved integer. Multi-vector unsigned saturating rounding shift right narrow by immediate. Multi-vector unsigned 32-bit integer saturating rounding shift right narrow by immediate to 16-bit integer. Multi-vector unsigned saturating rounding shift right narrow by immediate to interleaved integer. Multi-vector unsigned rounding shift left by vector. Multi-vector unsigned rounding shift left. Multi-vector unsigned by signed 8-bit integer dot product by indexed element to 32-bit integer. Multi-vector unsigned by signed 8-bit integer dot product by vector to 32-bit integer. Multi-vector unsigned by signed 8-bit integer dot product to 32-bit integer. Multi-vector unsigned by signed 8-bit integer multiply-add by indexed element to 32-bit integer. Multi-vector unsigned by signed 8-bit integer multiply-add by vector to 32-bit integer. Multi-vector unsigned by signed 8-bit integer multiply-add to 32-bit integer. Unsigned by signed integer quarter-tile sum of outer products, accumulating. Unsigned by signed integer quarter-tile sum of outer products, subtracting. Unsigned by signed integer sum of outer products, accumulating. Unsigned by signed integer sum of outer products, subtracting. Unsigned by signed 8-bit integer sparse sum of outer products to 32-bit integer, accumulating. Multi-vector unsigned by signed 8-bit integer vertical dot product by indexed element to 32-bit integer. Unsigned 16-bit integer sparse sum of outer products to 32-bit integer, accumulating. Unsigned 8-bit integer sparse sum of outer products to 32-bit integer, accumulating. Unpack and zero-extend multi-vector elements. Multi-vector unsigned 16-bit integer vertical dot product by indexed element to 32-bit integer. Multi-vector unsigned integer vertical dot product by indexed element. Concatenate elements from four vectors. Concatenate elements from two vectors. Zero ZA double-vector groups. Zero ZA quad-vector groups. Zero ZA single-vector groups. Zero ZT0. Zero a list of 64-bit element ZA tiles. Interleave elements from four vectors. Interleave elements from two vectors.