PACIA, PACIA1716, PACIASP, PACIAZ, PACIZA
Pointer Authentication Code for instruction address, using key A
This instruction computes and inserts a Pointer Authentication Code
for an instruction address, using a modifier and key A.
The address is:
In the general-purpose register that is specified by
<Xd> for PACIA and PACIZA.
In X17, for PACIA1716.
In X30, for PACIASP and PACIAZ.
The modifier is:
In the general-purpose register or stack pointer that is specified
by <Xn|SP> for PACIA.
The value zero, for PACIZA and PACIAZ.
In X16, for PACIA1716.
In SP, for PACIASP.
If FEAT_PAuth_LR is implemented and PSTATE.PACM is 1, then
PACIA1716 and PACIASP include a second modifier that is:
In X15, for PACIA1716.
The value of PC, for PACIASP.
A PACIASP instruction has an implicit BTI instruction. The
implicit BTI instruction of a PACIASP instruction is always
compatible with PSTATE.BTYPE == 0b01
and PSTATE.BTYPE == 0b10.
Controls in SCTLR_ELx configure whether the
implicit BTI instruction of a PACIASP instruction is compatible with
PSTATE.BTYPE == 0b11.
For more information, see PSTATE.BTYPE.
It has encodings from 2 classes:
Integer
and
System
1
1
0
1
1
0
1
0
1
1
0
0
0
0
0
1
0
0
0
0
0
0
PACIA <Xd>, <Xn|SP>
1
1
1
1
1
1
PACIZA <Xd>
if !IsFeatureImplemented(FEAT_PAuth) then EndOfDecode(Decode_UNDEF); end;
var source_is_sp : boolean = FALSE;
let pacia1716 : boolean = FALSE;
let d : integer = UInt(Rd);
let n : integer = UInt(Rn);
if Z == '0' then // PACIA
if n == 31 then source_is_sp = TRUE; end;
else // PACIZA
if n != 31 then EndOfDecode(Decode_UNDEF); end;
end;
1
1
0
1
0
1
0
1
0
0
0
0
0
0
1
1
0
0
1
0
0
0
x
1
0
0
x
1
1
1
1
1
0
0
PACIA1716
1
1
PACIASP
1
0
PACIAZ
if !IsFeatureImplemented(FEAT_PAuth) then EndOfDecode(Decode_NOP); end;
var d : integer;
var n : integer;
var source_is_sp : boolean = FALSE;
var pacia1716 : boolean = FALSE;
case CRm::op2 of
when '0011 000' => // PACIAZ
d = 30;
n = 31;
when '0011 001' => // PACIASP
d = 30;
source_is_sp = TRUE;
if IsFeatureImplemented(FEAT_BTI) then
// Check for branch target compatibility between PSTATE.BTYPE
// and implicit branch target of PACIASP instruction.
let pacinst : PACInstType = PACIxSP;
SetBTypeCompatible(BTypeCompatible_PAC(pacinst));
end;
when '0001 000' => // PACIA1716
d = 17;
n = 16;
pacia1716 = TRUE;
end;
<Xd>
Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field.
<Xn|SP>
Is the 64-bit name of the general-purpose source register or stack pointer, encoded in the "Rn" field.
if source_is_sp then
if IsFeatureImplemented(FEAT_PAuth_LR) && PSTATE.PACM == '1' then
X{64}(d) = AddPACIA2(X{64}(d), SP{64}(), PC64());
else
X{64}(d) = AddPACIA(X{64}(d), SP{64}());
end;
else
if IsFeatureImplemented(FEAT_PAuth_LR) && PSTATE.PACM == '1' && pacia1716 then
X{64}(d) = AddPACIA2(X{64}(d), X{64}(n), X{64}(15));
else
X{64}(d) = AddPACIA(X{64}(d), X{64}(n));
end;
end;
2026-03-12 12:23:09
2025-09_rel_asl1