RCWCAS, RCWCASA, RCWCASAL, RCWCASL
Read check write compare and swap doubleword in memory
This instruction reads a 64-bit doubleword
from memory, and compares it against the value held in a register. If the comparison
is equal, the value in a second register is conditionally written to memory.
Storing back to memory is conditional on RCW Checks. If the compare fails or the RCW Checks fail,
the architecture permits writing the value read from the location to memory.
If the write is performed, the read and the write occur atomically such that no other
modification of the memory location can take place between the read and the write.
This instruction updates the condition flags based on the result of the update of
memory.
If the destination register is not XZR, RCWCASA and RCWCASAL load from memory with acquire semantics.
RCWCASL and RCWCASAL store to memory with release semantics.
RCWCAS has neither acquire nor release semantics.
This instruction is for performing atomic updates of translation table entries and not for general use.
0
0
0
1
1
0
0
1
1
0
0
0
0
1
0
0
0
RCWCAS <Xs>, <Xt>, [<Xn|SP>]
1
0
RCWCASA <Xs>, <Xt>, [<Xn|SP>]
1
1
RCWCASAL <Xs>, <Xt>, [<Xn|SP>]
0
1
RCWCASL <Xs>, <Xt>, [<Xn|SP>]
if !IsFeatureImplemented(FEAT_THE) then EndOfDecode(Decode_UNDEF); end;
let s : integer{} = UInt(Rs);
let t : integer{} = UInt(Rt);
let n : integer{} = UInt(Rn);
let soft : boolean = FALSE;
let acquire : boolean = A == '1' && t != 31;
let release : boolean = R == '1';
let tagchecked : boolean = n != 31;
<Xs>
Is the 64-bit name of the general-purpose register to be compared and loaded, encoded in the "Rs" field.
<Xt>
Is the 64-bit name of the general-purpose register to be conditionally stored, encoded in the "Rt" field.
<Xn|SP>
Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field.
if IsD128Enabled(PSTATE.EL) then Undefined(); end;
var address : bits(64);
let newdata : bits(64) = X{}(t);
let compdata : bits(64) = X{}(s);
var readdata : bits(64);
var nzcv : bits(4);
let accdesc : AccessDescriptor = CreateAccDescRCW(MemAtomicOp_CAS, soft, acquire, release,
tagchecked, t, s);
if n == 31 then
CheckSPAlignment();
address = SP{64}();
else
address = X{64}(n);
end;
(nzcv, readdata) = MemAtomicRCW{64}(address, compdata, newdata, accdesc);
PSTATE.[N,Z,C,V] = nzcv;
X{64}(s) = readdata; // Return the old value when s!=31
2026-03-12 12:23:09
2025-09_rel_asl1