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<instructionsection id="SBFIZ_SBFM" title="SBFIZ -- A64" type="alias">
  <docvars>
    <docvar key="alias_mnemonic" value="SBFIZ"/>
    <docvar key="bitfield-fill" value="signed-fill"/>
    <docvar key="instr-class" value="general"/>
    <docvar key="isa" value="A64"/>
    <docvar key="mnemonic" value="SBFM"/>
  </docvars>
  <heading>SBFIZ</heading>
  <desc>
    <brief>
      <para>Signed bitfield insert in zeros</para>
    </brief>
    <authored>
      <para>This instruction copies a bitfield of
<syntax>&lt;width&gt;</syntax> bits from the least significant bits of the source
register to bit position <syntax>&lt;lsb&gt;</syntax> of the destination
register, setting the destination bits below the bitfield to zero,
and the bits above the bitfield to a copy of the most significant
bit of the bitfield.</para>
    </authored>
  </desc>
  <operationalnotes/>
  <aliasto refiform="sbfm.xml" iformid="SBFM">SBFM</aliasto>
  <classes>
    <iclass name="With sign replication to left and zeros to right" oneof="1" id="iclass_with_sign_replication_to_left_and_zeros_to_right" no_encodings="2" isa="A64">
      <docvars>
        <docvar key="bitfield-fill" value="signed-fill"/>
        <docvar key="instr-class" value="general"/>
        <docvar key="isa" value="A64"/>
        <docvar key="mnemonic" value="SBFM"/>
      </docvars>
      <iclassintro count="2"/>
      <regdiagram form="32" psname="A64.dpimm.bitfield.SBFM_32M_bitfield.SBFIZ" tworows="1">
        <box hibit="31" width="1" name="sf" usename="1">
          <c colspan="1"/>
        </box>
        <box hibit="30" width="2" name="opc" usename="1" settings="2" psbits="xx">
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="28" width="6" settings="6">
          <c>1</c>
          <c>0</c>
          <c>0</c>
          <c>1</c>
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="22" width="1" name="N" usename="1">
          <c colspan="1"/>
        </box>
        <box hibit="21" width="6" name="immr" usename="1">
          <c colspan="6"/>
        </box>
        <box hibit="15" width="6" name="imms" usename="1">
          <c colspan="6"/>
        </box>
        <box hibit="9" width="5" name="Rn" usename="1">
          <c colspan="5"/>
        </box>
        <box hibit="4" width="5" name="Rd" usename="1">
          <c colspan="5"/>
        </box>
      </regdiagram>
      <encoding name="SBFIZ_SBFM_32M_bitfield" oneofinclass="2" oneof="2" label="32-bit" bitdiffs="sf == 0 &amp;&amp; N == 0">
        <docvars>
          <docvar key="bitfield-fill" value="signed-fill"/>
          <docvar key="datatype" value="32"/>
          <docvar key="instr-class" value="general"/>
          <docvar key="isa" value="A64"/>
          <docvar key="mnemonic" value="SBFM"/>
          <docvar key="alias_mnemonic" value="SBFIZ"/>
        </docvars>
        <box hibit="31" width="1" name="sf">
          <c>0</c>
        </box>
        <box hibit="22" width="1" name="N">
          <c>0</c>
        </box>
        <asmtemplate><text>SBFIZ  </text><a hover="Is the 32-bit name of the general-purpose destination register, encoded in the &quot;Rd&quot; field." link="WdOrWZR">&lt;Wd&gt;</a><text>, </text><a hover="Is the 32-bit name of the general-purpose source register, encoded in the &quot;Rn&quot; field." link="WnOrWZR">&lt;Wn&gt;</a><text>, #</text><a hover="For the &quot;32-bit&quot; variant: is the bit number of the lsb of the destination bitfield, in the range 0 to 31." link="lsb">&lt;lsb&gt;</a><text>, #</text><a hover="For the &quot;32-bit&quot; variant: is the width of the bitfield, in the range 1 to 32-&lt;lsb&gt;." link="width">&lt;width&gt;</a></asmtemplate>
        <equivalent_to>
          <asmtemplate><a href="sbfm.xml#SBFM_32M_bitfield">SBFM</a><text>  </text><a hover="Is the 32-bit name of the general-purpose destination register, encoded in the &quot;Rd&quot; field." href="sbfm.xml#WdOrWZR">&lt;Wd&gt;</a><text>, </text><a hover="Is the 32-bit name of the general-purpose source register, encoded in the &quot;Rn&quot; field." href="sbfm.xml#WnOrWZR">&lt;Wn&gt;</a><text>, #(-</text><a hover="For the &quot;32-bit&quot; variant: is the bit number of the lsb of the destination bitfield, in the range 0 to 31." href="sbfm.xml#lsb">&lt;lsb&gt;</a><text>  MOD  32), #(</text><a hover="For the &quot;32-bit&quot; variant: is the width of the bitfield, in the range 1 to 32-&lt;lsb&gt;." href="sbfm.xml#width">&lt;width&gt;</a><text>-1)</text></asmtemplate>
          <aliascond>UInt(imms) &lt; UInt(immr)</aliascond>
        </equivalent_to>
      </encoding>
      <encoding name="SBFIZ_SBFM_64M_bitfield" oneofinclass="2" oneof="2" label="64-bit" bitdiffs="sf == 1 &amp;&amp; N == 1">
        <docvars>
          <docvar key="bitfield-fill" value="signed-fill"/>
          <docvar key="datatype" value="64"/>
          <docvar key="instr-class" value="general"/>
          <docvar key="isa" value="A64"/>
          <docvar key="mnemonic" value="SBFM"/>
          <docvar key="alias_mnemonic" value="SBFIZ"/>
        </docvars>
        <box hibit="31" width="1" name="sf">
          <c>1</c>
        </box>
        <box hibit="22" width="1" name="N">
          <c>1</c>
        </box>
        <asmtemplate><text>SBFIZ  </text><a hover="Is the 64-bit name of the general-purpose destination register, encoded in the &quot;Rd&quot; field." link="XdOrXZR__6">&lt;Xd&gt;</a><text>, </text><a hover="Is the 64-bit name of the general-purpose source register, encoded in the &quot;Rn&quot; field." link="XnOrXZR__11">&lt;Xn&gt;</a><text>, #</text><a hover="For the &quot;64-bit&quot; variant: is the bit number of the lsb of the destination bitfield, in the range 0 to 63." link="lsb__3">&lt;lsb&gt;</a><text>, #</text><a hover="For the &quot;64-bit&quot; variant: is the width of the bitfield, in the range 1 to 64-&lt;lsb&gt;." link="width__2">&lt;width&gt;</a></asmtemplate>
        <equivalent_to>
          <asmtemplate><a href="sbfm.xml#SBFM_64M_bitfield">SBFM</a><text>  </text><a hover="Is the 64-bit name of the general-purpose register that holds the destination address and is updated by the instruction, encoded in the &quot;Rd&quot; field." href="sbfm.xml#XdOrXZR">&lt;Xd&gt;</a><text>, </text><a hover="Is the 64-bit name of the general-purpose register holding the address to be branched to, encoded in the &quot;Rn&quot; field." href="sbfm.xml#XnOrXZR">&lt;Xn&gt;</a><text>, #(-</text><a hover="For the &quot;64-bit&quot; variant: is the bit number of the lsb of the destination bitfield, in the range 0 to 63." href="sbfm.xml#lsb__3">&lt;lsb&gt;</a><text>  MOD  64), #(</text><a hover="For the &quot;64-bit&quot; variant: is the width of the bitfield, in the range 1 to 64-&lt;lsb&gt;." href="sbfm.xml#width__2">&lt;width&gt;</a><text>-1)</text></asmtemplate>
          <aliascond>UInt(imms) &lt; UInt(immr)</aliascond>
        </equivalent_to>
      </encoding>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="SBFIZ_SBFM_32M_bitfield" symboldefcount="1">
      <symbol link="WdOrWZR">&lt;Wd&gt;</symbol>
      <account encodedin="Rd">
        <intro>
          <para>Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="SBFIZ_SBFM_32M_bitfield" symboldefcount="1">
      <symbol link="WnOrWZR">&lt;Wn&gt;</symbol>
      <account encodedin="Rn">
        <intro>
          <para>Is the 32-bit name of the general-purpose source register, encoded in the "Rn" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="SBFIZ_SBFM_32M_bitfield" symboldefcount="1">
      <symbol link="lsb">&lt;lsb&gt;</symbol>
      <account encodedin="immr">
        <intro>
          <para>For the "32-bit" variant: is the bit number of the lsb of the destination bitfield, in the range 0 to 31.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="SBFIZ_SBFM_64M_bitfield" symboldefcount="2">
      <symbol link="lsb__3">&lt;lsb&gt;</symbol>
      <account encodedin="immr">
        <intro>
          <para>For the "64-bit" variant: is the bit number of the lsb of the destination bitfield, in the range 0 to 63.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="SBFIZ_SBFM_32M_bitfield" symboldefcount="1">
      <symbol link="width">&lt;width&gt;</symbol>
      <account encodedin="(imms :: immr)">
        <intro>
          <para>For the "32-bit" variant: is the width of the bitfield, in the range 1 to 32-&lt;lsb&gt;.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="SBFIZ_SBFM_64M_bitfield" symboldefcount="2">
      <symbol link="width__2">&lt;width&gt;</symbol>
      <account encodedin="(imms :: immr)">
        <intro>
          <para>For the "64-bit" variant: is the width of the bitfield, in the range 1 to 64-&lt;lsb&gt;.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="SBFIZ_SBFM_64M_bitfield" symboldefcount="1">
      <symbol link="XdOrXZR__6">&lt;Xd&gt;</symbol>
      <account encodedin="Rd">
        <intro>
          <para>Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="SBFIZ_SBFM_64M_bitfield" symboldefcount="1">
      <symbol link="XnOrXZR__11">&lt;Xn&gt;</symbol>
      <account encodedin="Rn">
        <intro>
          <para>Is the 64-bit name of the general-purpose source register, encoded in the "Rn" field.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
  <timestamp>2026-03-12 12:23:09</timestamp>
  <commit_id>2025-09_rel_asl1</commit_id>
</instructionsection>
