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<instructionsection id="SHA1P_advsimd" title="SHA1P -- A64" type="instruction">
  <docvars>
    <docvar key="instr-class" value="advsimd"/>
    <docvar key="isa" value="A64"/>
    <docvar key="mnemonic" value="SHA1P"/>
  </docvars>
  <heading>SHA1P</heading>
  <desc>
    <brief>
      <para>SHA1 hash update (parity)</para>
    </brief>
    <authored>
      <para>SHA1 hash update (parity).</para>
    </authored>
  </desc>
  <operationalnotes>
    <operationalnote>
      <operationalnote_content>
        <para>This instruction is a data-independent-time instruction as described in <xref linkend="ARMARM_BEICCDDAB3">About PSTATE.DIT</xref>.</para>
      </operationalnote_content>
    </operationalnote>
  </operationalnotes>
  <alias_list howmany="0"/>
  <classes>
    <iclass name="Advanced SIMD" oneof="1" id="iclass_advanced_simd" no_encodings="1" isa="A64">
      <docvars>
        <docvar key="instr-class" value="advsimd"/>
        <docvar key="isa" value="A64"/>
        <docvar key="mnemonic" value="SHA1P"/>
      </docvars>
      <iclassintro count="1"/>
      <arch_variants>
        <arch_variant feature="FEAT_SHA1" name="v8Ap0"/>
      </arch_variants>
      <regdiagram form="32" psname="A64.simd_dp.cryptosha3.SHA1P_QSV_cryptosha3" tworows="1">
        <box hibit="31" width="4" settings="4">
          <c>0</c>
          <c>1</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="27" width="3" settings="3">
          <c>1</c>
          <c>1</c>
          <c>1</c>
        </box>
        <box hibit="24" width="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="23" width="2" name="size" usename="1" settings="2" psbits="xx">
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="21" width="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="20" width="5" name="Rm" usename="1">
          <c colspan="5"/>
        </box>
        <box hibit="15" width="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="14" width="3" name="opcode" usename="1" settings="3" psbits="xxx">
          <c>0</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="11" width="2" settings="2">
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="9" width="5" name="Rn" usename="1">
          <c colspan="5"/>
        </box>
        <box hibit="4" width="5" name="Rd" usename="1">
          <c colspan="5"/>
        </box>
      </regdiagram>
      <encoding name="SHA1P_QSV_cryptosha3" oneofinclass="1" oneof="1" label="">
        <docvars>
          <docvar key="instr-class" value="advsimd"/>
          <docvar key="isa" value="A64"/>
          <docvar key="mnemonic" value="SHA1P"/>
        </docvars>
        <asmtemplate><text>SHA1P  </text><a hover="Is the 128-bit name of the SIMD&amp;FP source and destination, encoded in the &quot;Rd&quot; field." link="Qd">&lt;Qd&gt;</a><text>, </text><a hover="Is the 32-bit name of the second SIMD&amp;FP source register, encoded in the &quot;Rn&quot; field." link="Sn__2">&lt;Sn&gt;</a><text>, </text><a hover="Is the name of the third SIMD&amp;FP source register, encoded in the &quot;Rm&quot; field." link="Vm__7">&lt;Vm&gt;</a><text>.4S</text></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="A64.simd_dp.cryptosha3.SHA1P_QSV_cryptosha3" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">if !IsFeatureImplemented(FEAT_SHA1) then EndOfDecode(Decode_UNDEF); end;
let d : integer{} = UInt(Rd);
let n : integer{} = UInt(Rn);
let m : integer{} = UInt(Rm);</pstext></ps>
      </ps_section>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="SHA1P_QSV_cryptosha3" symboldefcount="1">
      <symbol link="Qd">&lt;Qd&gt;</symbol>
      <account encodedin="Rd">
        <intro>
          <para>Is the 128-bit name of the SIMD&amp;FP source and destination, encoded in the "Rd" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="SHA1P_QSV_cryptosha3" symboldefcount="1">
      <symbol link="Sn__2">&lt;Sn&gt;</symbol>
      <account encodedin="Rn">
        <intro>
          <para>Is the 32-bit name of the second SIMD&amp;FP source register, encoded in the "Rn" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="SHA1P_QSV_cryptosha3" symboldefcount="1">
      <symbol link="Vm__7">&lt;Vm&gt;</symbol>
      <account encodedin="Rm">
        <intro>
          <para>Is the name of the third SIMD&amp;FP source register, encoded in the "Rm" field.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
  <ps_section howmany="1">
    <ps name="A64.simd_dp.cryptosha3.SHA1P_QSV_cryptosha3" sections="1" secttype="Operation">
      <pstext mayhavelinks="1" section="Execute" rep_section="execute">AArch64_CheckFPAdvSIMDEnabled();

var x : bits(128) = V{}(d);
var y : bits(32) = V{}(n);    // Note: 32 not 128 bits wide
let w : bits(128) = V{}(m);

for e = 0 to 3 do
    let t : bits(32) = SHAparity(x[63:32], x[95:64], x[127:96]);
    y = y + ROL(x[31:0], 5) + t + w[e*:32];
    x[63:32] = ROL(x[63:32], 30);
    let yx : bits(160) = ROL(y::x, 32);
    (y, x) = (yx[159:128], yx[127:0]);
end;
V{128}(d) = x;</pstext></ps>
  </ps_section>
  <timestamp>2026-03-12 12:23:09</timestamp>
  <commit_id>2025-09_rel_asl1</commit_id>
</instructionsection>
