STLURH Store-release register halfword (unscaled) This instruction calculates an address from a base register value and an immediate offset, and stores a halfword to the calculated address, from a 32-bit register. The instruction has memory ordering semantics as described in Load-Acquire, Load-AcquirePC, and Store-Release For information about addressing modes, see Load/Store addressing modes. This instruction is a data-independent-time instruction as described in About PSTATE.DIT. 0 1 0 1 1 0 0 1 0 0 0 0 0 STLURH <Wt>, [<Xn|SP>{, #<simm>}] if !IsFeatureImplemented(FEAT_LRCPC2) then EndOfDecode(Decode_UNDEF); end; let offset : bits(64) = SignExtend{}(imm9); let n : integer = UInt(Rn); let t : integer = UInt(Rt); let datasize : integer{} = 16; let acquire : boolean = FALSE; let tagchecked : boolean = n != 31; <Wt> Is the 32-bit name of the general-purpose register to be transferred, encoded in the "Rt" field. <Xn|SP> Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field. <simm> Is the optional signed immediate byte offset, in the range -256 to 255, defaulting to 0 and encoded in the "imm9" field. var address : bits(64); let accdesc : AccessDescriptor = CreateAccDescAcqRel(MemOp_STORE, tagchecked, acquire, t); if n == 31 then CheckSPAlignment(); address = SP{64}(); else address = X{64}(n); end; address = AddressAdd(address, offset, accdesc); Mem{datasize}(address, accdesc) = X{datasize}(t); 2026-03-12 12:23:09 2025-09_rel_asl1