STRB (register)
Store register byte (register)
This instruction calculates an
address from a base register value and an offset register value,
and stores a byte from a 32-bit register
to the calculated address.
For information about addressing modes, see
Load/Store addressing modes.
The instruction uses an offset addressing mode, that calculates
the address used for the memory access from a base register value
and an offset register value. The offset can be optionally shifted
and extended.
This instruction is a data-independent-time instruction as described in About PSTATE.DIT.
0
0
1
1
1
0
0
0
0
0
1
1
0
Z
N
N
STRB <Wt>, [<Xn|SP>, (<Wm>|<Xm>), <extend> {<amount>}]
0
1
1
STRB <Wt>, [<Xn|SP>, <Xm>{, LSL <amount>}]
if option[1] == '0' then EndOfDecode(Decode_UNDEF); end; // sub-word index
let extend_type : ExtendType = DecodeRegExtend(option);
let shift : integer{} = 0;
<Wt>
Is the 32-bit name of the general-purpose register to be transferred, encoded in the "Rt" field.
<Xn|SP>
Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field.
<Wm>
When option<0> is set to 0, is the 32-bit name of the general-purpose index register, encoded in the "Rm" field.
<Xm>
When option<0> is set to 1, is the 64-bit name of the general-purpose index register, encoded in the "Rm" field.
<extend>
Is the index extend specifier,
option
<extend>
010
UXTW
110
SXTW
111
SXTX
<amount>
Is the index shift amount, it must be #0, encoded in "S" as 0 if omitted, or as 1 if present.
let t : integer{} = UInt(Rt);
let n : integer{} = UInt(Rn);
let m : integer{} = UInt(Rm);
let nontemporal : boolean = FALSE;
let tagchecked : boolean = TRUE;
let offset : bits(64) = ExtendReg{}(m, extend_type, shift);
var address : bits(64);
let privileged : boolean = PSTATE.EL != EL0;
let accdesc : AccessDescriptor = CreateAccDescGPR(MemOp_STORE, nontemporal, privileged,
tagchecked, t);
if n == 31 then
CheckSPAlignment();
address = SP{64}();
else
address = X{64}(n);
end;
address = AddressAdd(address, offset, accdesc);
Mem{8}(address, accdesc) = X{8}(t);
2026-03-12 12:23:09
2025-09_rel_asl1