SYSP 128-bit system instruction 128-bit system instruction. This instruction is used by the alias TLBIP CRn IN {'100x'} && SysOp128(op1, CRn, CRm, op2) == Sys_TLBIP See below for details of when the alias is preferred. 1 1 0 1 0 1 0 1 0 1 0 0 1 SYSP #<op1>, <Cn>, <Cm>, #<op2>{, <Xt1>, <Xt2>} if !IsFeatureImplemented(FEAT_SYSINSTR128) then EndOfDecode(Decode_UNDEF); end; if Rt[0] == '1' && Rt != '11111' then EndOfDecode(Decode_UNDEF); end; let t : integer = UInt(Rt); let t2 : integer = if t == 31 then 31 else t + 1; let sys_L : bits(1) = L; let sys_op0 : bits(2) = '01'; let sys_op1 : bits(3) = op1; let sys_op2 : bits(3) = op2; let sys_crn : bits(4) = CRn; let sys_crm : bits(4) = CRm; <op1> Is a 3-bit unsigned immediate, in the range 0 to 6, encoded in the "op1" field. <Cn> Is a name 'Cn', with 'n' in the range 8 to 9, encoded in the "CRn" field. <Cm> Is a name 'Cm', with 'm' in the range 0 to 7, encoded in the "CRm" field. <op2> Is a 3-bit unsigned immediate, in the range 0 to 7, encoded in the "op2" field. <Xt1> Is the 64-bit name of the first optional general-purpose source register, defaulting to '11111', encoded in the "Rt" field. <Xt2> Is the 64-bit name of the second optional general-purpose source register, defaulting to '11111', encoded as "Rt" +1. Defaults to '11111' if "Rt" = '11111'. Alias Conditions AArch64_SysInstr128(sys_op0, sys_op1, sys_crn, sys_crm, sys_op2, t, t2); 2026-03-12 12:23:09 2025-09_rel_asl1