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LDLARH -- A64

LDLARH

Load LOAcquire register halfword

This instruction loads a halfword from memory, zero-extends it, and writes it to a register.

If the destination register is not one of WZR or XZR, LDLARH loads from memory with Acquire semantics.

For more information about memory ordering semantics, see Load LOAcquire, Store LORelease and Load-Acquire, Load-AcquirePC, and Store-Release.

For information about addressing modes, see Load/Store addressing modes.

No offset
(FEAT_LOR)

313029282726252423222120191817161514131211109876543210
01001000110(1)(1)(1)(1)(1)0(1)(1)(1)(1)(1)RnRt
sizeLRso0Rt2

Encoding

LDLARH <Wt>, [<Xn|SP>{, #0}]

Decode for this encoding

if !IsFeatureImplemented(FEAT_LOR) then EndOfDecode(Decode_UNDEF); end; let t : integer{} = UInt(Rt); let n : integer{} = UInt(Rn); let acquire : boolean = t != 31; let tagchecked : boolean = n != 31;

Assembler Symbols

<Wt>

Is the 32-bit name of the general-purpose register to be transferred, encoded in the "Rt" field.

<Xn|SP>

Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field.

Operational information

This instruction is a data-independent-time instruction as described in About PSTATE.DIT.


2025-09_rel_asl1 2026-03-12 12:57:38

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