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RCWSCLR, RCWSCLRA, RCWSCLRAL, RCWSCLRL -- A64

RCWSCLR, RCWSCLRA, RCWSCLRAL, RCWSCLRL

Read check write software atomic bit clear on doubleword in memory

This instruction atomically loads a 64-bit doubleword from memory, performs a bitwise AND with the complement of the value held in a register on it, and conditionally stores the result back to memory. Storing of the result back to memory is conditional on RCW Checks and RCWS Checks. The value initially loaded from memory is returned in the destination register. This instruction updates the condition flags based on the result of the update of memory.


Note

This instruction is for performing atomic updates of translation table entries and not for general use.


Integer
(FEAT_THE)

313029282726252423222120191817161514131211109876543210
01111000AR1Rs100100RnRt
SVRo3opc

Encoding for the RCWSCLR variant

Applies when (A == 0 && R == 0)

RCWSCLR <Xs>, <Xt>, [<Xn|SP>]

Encoding for the RCWSCLRA variant

Applies when (A == 1 && R == 0)

RCWSCLRA <Xs>, <Xt>, [<Xn|SP>]

Encoding for the RCWSCLRAL variant

Applies when (A == 1 && R == 1)

RCWSCLRAL <Xs>, <Xt>, [<Xn|SP>]

Encoding for the RCWSCLRL variant

Applies when (A == 0 && R == 1)

RCWSCLRL <Xs>, <Xt>, [<Xn|SP>]

Decode for all variants of this encoding

if !IsFeatureImplemented(FEAT_THE) then EndOfDecode(Decode_UNDEF); end; let s : integer{} = UInt(Rs); let t : integer{} = UInt(Rt); let n : integer{} = UInt(Rn); let soft : boolean = TRUE; let acquire : boolean = A == '1' && t != 31; let release : boolean = R == '1'; let tagchecked : boolean = n != 31;

Assembler Symbols

<Xs>

Is the 64-bit name of the general-purpose register to be stored, encoded in the "Rs" field.

<Xt>

Is the 64-bit name of the general-purpose register to be loaded, encoded in the "Rt" field.

<Xn|SP>

Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field.


2025-09_rel_asl1 2026-03-12 12:57:38

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