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STLRH -- A64

STLRH

Store-release register halfword

This instruction stores a halfword from a 32-bit register to a memory location. The instruction also has memory ordering semantics as described in Load-Acquire, Store-Release. For information about addressing modes, see Load/Store addressing modes.

313029282726252423222120191817161514131211109876543210
01001000100(1)(1)(1)(1)(1)1(1)(1)(1)(1)(1)RnRt
sizeLRso0Rt2

Encoding

STLRH <Wt>, [<Xn|SP>{, #0}]

Decode for this encoding

let t : integer{} = UInt(Rt); let n : integer{} = UInt(Rn); let acquire : boolean = FALSE; let tagchecked : boolean = n != 31;

Assembler Symbols

<Wt>

Is the 32-bit name of the general-purpose register to be transferred, encoded in the "Rt" field.

<Xn|SP>

Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field.

Operational information

This instruction is a data-independent-time instruction as described in About PSTATE.DIT.


2025-09_rel_asl1 2026-03-12 12:57:38

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