<?xml version="1.0" ?><?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?><!DOCTYPE instructionsection  PUBLIC '-//ARM//DTD instructionsection //EN'  'iform-p.dtd'><!-- Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. --><!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. --><instructionsection id="ctermeq_rr" title="CTERMEQ, CTERMNE -- A64" type="instruction">
  <docvars>
    <docvar key="instr-class" value="sve"/>
    <docvar key="isa" value="A64"/>
  </docvars>
  <heading>CTERMEQ, CTERMNE</heading>
  <desc>
    <brief>
      <para>Compare and terminate loop</para>
    </brief>
    <authored>
      <para>This instruction detects termination conditions in serialized vector
loops by testing whether the comparison
between the scalar source operands holds true. If the comparison is
not successful, the instruction tests the state of the !Last condition flag
(C), which indicates whether the previous flag-setting
predicate instruction selected the last element of the
vector partition.</para>
      <para>The Z and C condition flags are preserved by this
instruction.  The N and V condition flags are set as a
pair to generate one of the following conditions for a
subsequent conditional instruction:</para>
      <table>
        <tgroup cols="4">
          <thead>
            <row>
              <entry>Condition</entry>
              <entry>N</entry>
              <entry>V</entry>
              <entry>Meaning</entry>
            </row>
          </thead>
          <tbody>
            <row>
              <entry>GE</entry>
              <entry>0</entry>
              <entry>0</entry>
              <entry>Continue loop (compare failed and last element not selected)</entry>
            </row>
            <row>
              <entry>LT</entry>
              <entry>0</entry>
              <entry>1</entry>
              <entry>Terminate loop (last element selected)</entry>
            </row>
            <row>
              <entry>LT</entry>
              <entry>1</entry>
              <entry>0</entry>
              <entry>Terminate loop (compare succeeded)</entry>
            </row>
            <row>
              <entry>GE</entry>
              <entry>1</entry>
              <entry>1</entry>
              <entry>Never generated</entry>
            </row>
          </tbody>
        </tgroup>
      </table>
      <para>The scalar source operands are 32-bit or 64-bit general-purpose
registers of the same size.</para>
    </authored>
    <predicated>False</predicated>
    <uses_dit condition="FEAT_SVE2 is implemented or FEAT_SME is implemented">True</uses_dit>
  </desc>
  <operationalnotes>
    <operationalnote>
      <operationalnote_content>
        <para>This instruction is a data-independent-time instruction as described in <xref linkend="ARMARM_BEICCDDAB3">About PSTATE.DIT</xref>.</para>
      </operationalnote_content>
    </operationalnote>
  </operationalnotes>
  <alias_list howmany="0"/>
  <classes>
    <classesintro count="2">
      <txt>It has encodings from 2 classes:</txt>
      <a href="#iclass_equal">Equal</a>
      <txt> and </txt>
      <a href="#iclass_not_equal">Not equal</a>
    </classesintro>
    <iclass name="Equal" oneof="2" id="iclass_equal" no_encodings="1" isa="A64">
      <docvars>
        <docvar key="instr-class" value="sve"/>
        <docvar key="isa" value="A64"/>
        <docvar key="mnemonic" value="CTERMEQ"/>
        <docvar key="sve-compare-type" value="eq"/>
      </docvars>
      <iclassintro count="1"/>
      <arch_variants>
        <arch_variant feature="FEAT_SVE || FEAT_SME" name="(v8Ap2 &amp;&amp; PROFILE_A) || (v9Ap2 &amp;&amp; PROFILE_A)"/>
      </arch_variants>
      <regdiagram form="32" psname="A64.sve.sve_cmpgpr.sve_int_cterm.ctermeq_rr_" tworows="1">
        <box hibit="31" width="3" settings="3">
          <c>0</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="28" width="4" settings="4">
          <c>0</c>
          <c>0</c>
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="24" width="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="23" name="op" usename="1" settings="1" psbits="x">
          <c>1</c>
        </box>
        <box hibit="22" width="1" name="sz" usename="1">
          <c colspan="1"/>
        </box>
        <box hibit="21" width="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="20" width="5" name="Rm" usename="1">
          <c colspan="5"/>
        </box>
        <box hibit="15" width="2" settings="2">
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="13" width="2" settings="2">
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="11" width="2" settings="2">
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="9" width="5" name="Rn" usename="1">
          <c colspan="5"/>
        </box>
        <box hibit="4" name="ne" usename="1" settings="1" psbits="x">
          <c>0</c>
        </box>
        <box hibit="3" width="4" settings="4">
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
        </box>
      </regdiagram>
      <encoding name="ctermeq_rr_" oneofinclass="1" oneof="2" label="">
        <docvars>
          <docvar key="instr-class" value="sve"/>
          <docvar key="isa" value="A64"/>
          <docvar key="sve-compare-type" value="eq"/>
          <docvar key="mnemonic" value="CTERMEQ"/>
        </docvars>
        <asmtemplate><text>CTERMEQ  </text><a hover="Is a width specifier, " link="R__4">&lt;R&gt;</a><a hover="Is the number [0-30] of the source general-purpose register or the name ZR (31), encoded in the &quot;Rn&quot; field." link="n__5">&lt;n&gt;</a><text>, </text><a hover="Is a width specifier, " link="R__4">&lt;R&gt;</a><a hover="Is the number [0-30] of the source general-purpose register or the name ZR (31), encoded in the &quot;Rm&quot; field." link="m__3">&lt;m&gt;</a></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="A64.sve.sve_cmpgpr.sve_int_cterm.ctermeq_rr_" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">if !IsFeatureImplemented(FEAT_SVE) &amp;&amp; !IsFeatureImplemented(FEAT_SME) then
    <a link="func_EndOfDecode_1" file="shared_pseudocode.xml">EndOfDecode</a>(<a link="enum_Decode_UNDEF" file="shared_pseudocode.xml">Decode_UNDEF</a>);
end;
let esize : integer{} = 32 &lt;&lt; UInt(sz);
let n : integer = UInt(Rn);
let m : integer = UInt(Rm);
let cmp_op : <a link="type_CmpOp" file="shared_pseudocode.xml">CmpOp</a> = <a link="enum_Cmp_EQ" file="shared_pseudocode.xml">Cmp_EQ</a>;</pstext></ps>
      </ps_section>
    </iclass>
    <iclass name="Not equal" oneof="2" id="iclass_not_equal" no_encodings="1" isa="A64">
      <docvars>
        <docvar key="instr-class" value="sve"/>
        <docvar key="isa" value="A64"/>
        <docvar key="mnemonic" value="CTERMNE"/>
        <docvar key="sve-compare-type" value="ne"/>
      </docvars>
      <iclassintro count="1"/>
      <arch_variants>
        <arch_variant feature="FEAT_SVE || FEAT_SME" name="(v8Ap2 &amp;&amp; PROFILE_A) || (v9Ap2 &amp;&amp; PROFILE_A)"/>
      </arch_variants>
      <regdiagram form="32" psname="A64.sve.sve_cmpgpr.sve_int_cterm.ctermne_rr_" tworows="1">
        <box hibit="31" width="3" settings="3">
          <c>0</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="28" width="4" settings="4">
          <c>0</c>
          <c>0</c>
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="24" width="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="23" name="op" usename="1" settings="1" psbits="x">
          <c>1</c>
        </box>
        <box hibit="22" width="1" name="sz" usename="1">
          <c colspan="1"/>
        </box>
        <box hibit="21" width="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="20" width="5" name="Rm" usename="1">
          <c colspan="5"/>
        </box>
        <box hibit="15" width="2" settings="2">
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="13" width="2" settings="2">
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="11" width="2" settings="2">
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="9" width="5" name="Rn" usename="1">
          <c colspan="5"/>
        </box>
        <box hibit="4" name="ne" usename="1" settings="1" psbits="x">
          <c>1</c>
        </box>
        <box hibit="3" width="4" settings="4">
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
        </box>
      </regdiagram>
      <encoding name="ctermne_rr_" oneofinclass="1" oneof="2" label="">
        <docvars>
          <docvar key="instr-class" value="sve"/>
          <docvar key="isa" value="A64"/>
          <docvar key="sve-compare-type" value="ne"/>
          <docvar key="mnemonic" value="CTERMNE"/>
        </docvars>
        <asmtemplate><text>CTERMNE  </text><a hover="Is a width specifier, " link="R__4">&lt;R&gt;</a><a hover="Is the number [0-30] of the source general-purpose register or the name ZR (31), encoded in the &quot;Rn&quot; field." link="n__5">&lt;n&gt;</a><text>, </text><a hover="Is a width specifier, " link="R__4">&lt;R&gt;</a><a hover="Is the number [0-30] of the source general-purpose register or the name ZR (31), encoded in the &quot;Rm&quot; field." link="m__3">&lt;m&gt;</a></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="A64.sve.sve_cmpgpr.sve_int_cterm.ctermne_rr_" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">if !IsFeatureImplemented(FEAT_SVE) &amp;&amp; !IsFeatureImplemented(FEAT_SME) then
    <a link="func_EndOfDecode_1" file="shared_pseudocode.xml">EndOfDecode</a>(<a link="enum_Decode_UNDEF" file="shared_pseudocode.xml">Decode_UNDEF</a>);
end;
let esize : integer{} = 32 &lt;&lt; UInt(sz);
let n : integer = UInt(Rn);
let m : integer = UInt(Rm);
let cmp_op : <a link="type_CmpOp" file="shared_pseudocode.xml">CmpOp</a> = <a link="enum_Cmp_NE" file="shared_pseudocode.xml">Cmp_NE</a>;</pstext></ps>
      </ps_section>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="ctermeq_rr_, ctermne_rr_" symboldefcount="1">
      <symbol link="R__4">&lt;R&gt;</symbol>
      <definition encodedin="sz">
        <intro>Is a width specifier, </intro>
        <table class="valuetable">
          <tgroup cols="2">
            <thead>
              <row>
                <entry class="bitfield">sz</entry>
                <entry class="symbol">&lt;R&gt;</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry class="bitfield">0</entry>
                <entry class="symbol">W</entry>
              </row>
              <row>
                <entry class="bitfield">1</entry>
                <entry class="symbol">X</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </definition>
    </explanation>
    <explanation enclist="ctermeq_rr_, ctermne_rr_" symboldefcount="1">
      <symbol link="n__5">&lt;n&gt;</symbol>
      <account encodedin="Rn">
        <intro>
          <para>Is the number [0-30] of the source general-purpose register or the name ZR (31), encoded in the &quot;Rn&quot; field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="ctermeq_rr_, ctermne_rr_" symboldefcount="1">
      <symbol link="m__3">&lt;m&gt;</symbol>
      <account encodedin="Rm">
        <intro>
          <para>Is the number [0-30] of the source general-purpose register or the name ZR (31), encoded in the &quot;Rm&quot; field.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
  <ps_section howmany="1">
    <ps name="A64.sve.sve_cmpgpr.sve_int_cterm.ctermeq_rr_" sections="1" secttype="Operation">
      <pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="func_CheckSVEEnabled_0" file="shared_pseudocode.xml">CheckSVEEnabled</a>();
let operand1 : bits(esize) = X{}(n);
let operand2 : bits(esize) = X{}(m);
let element1 : integer = UInt(operand1);
let element2 : integer = UInt(operand2);
var term : boolean;

case cmp_op of
    when <a link="enum_Cmp_EQ" file="shared_pseudocode.xml">Cmp_EQ</a> =&gt; term = element1 == element2;
    when <a link="enum_Cmp_NE" file="shared_pseudocode.xml">Cmp_NE</a> =&gt; term = element1 != element2;
end;
if term then
    <a link="global_PSTATE" file="shared_pseudocode.xml">PSTATE</a>.N = '1';
    <a link="global_PSTATE" file="shared_pseudocode.xml">PSTATE</a>.V = '0';
else
    <a link="global_PSTATE" file="shared_pseudocode.xml">PSTATE</a>.N = '0';
    <a link="global_PSTATE" file="shared_pseudocode.xml">PSTATE</a>.V = (NOT <a link="global_PSTATE" file="shared_pseudocode.xml">PSTATE</a>.C);
end;</pstext></ps>
  </ps_section>
  <timestamp>2026-03-26 20:27:25</timestamp>
  <commit_id>2026-03_rel</commit_id>
</instructionsection>