<?xml version="1.0" ?><?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?><!DOCTYPE instructionsection  PUBLIC '-//ARM//DTD instructionsection //EN'  'iform-p.dtd'><!-- Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. --><!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. --><instructionsection id="DMB" title="DMB -- A64" type="instruction">
  <docvars>
    <docvar key="instr-class" value="system"/>
    <docvar key="isa" value="A64"/>
    <docvar key="mnemonic" value="DMB"/>
  </docvars>
  <heading>DMB</heading>
  <desc>
    <brief>
      <para>Data memory barrier</para>
    </brief>
    <authored>
      <para>This instruction is a memory barrier that ensures the ordering
of observations of memory accesses, see <xref linkend="ARMARM_BEIIECBH">Data Memory Barrier</xref>.</para>
    </authored>
  </desc>
  <alias_list howmany="0"/>
  <classes>
    <iclass name="System" oneof="1" id="iclass_system" no_encodings="1" isa="A64">
      <docvars>
        <docvar key="instr-class" value="system"/>
        <docvar key="isa" value="A64"/>
        <docvar key="mnemonic" value="DMB"/>
      </docvars>
      <iclassintro count="1"/>
      <regdiagram form="32" psname="A64.control.barriers.DMB_BO_barriers" tworows="1">
        <box hibit="31" width="3" settings="3">
          <c>1</c>
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="28" width="3" settings="3">
          <c>1</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="25" width="14" settings="14">
          <c>0</c>
          <c>1</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>1</c>
          <c>1</c>
          <c>0</c>
          <c>0</c>
          <c>1</c>
          <c>1</c>
        </box>
        <box hibit="11" width="4" name="CRm" usename="1">
          <c colspan="4"/>
        </box>
        <box hibit="7" width="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="6" width="2" name="opc" usename="1" settings="2" psbits="xx">
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="4" width="5" name="Rt" usename="1" settings="5" psbits="xxxxx">
          <c>1</c>
          <c>1</c>
          <c>1</c>
          <c>1</c>
          <c>1</c>
        </box>
      </regdiagram>
      <encoding name="DMB_BO_barriers" oneofinclass="1" oneof="1" label="">
        <docvars>
          <docvar key="instr-class" value="system"/>
          <docvar key="isa" value="A64"/>
          <docvar key="mnemonic" value="DMB"/>
        </docvars>
        <asmtemplate><text>DMB  (</text><a hover="Specifies the limitation on the Memory Effects ordered by the barrier operation, and is encoded in &quot;CRm&quot;.

For more information on whether a Memory Effect is before or after a barrier instruction,
see x[Data Memory Barrier (DMB)](BEIIECBH)." link="CRm_option__3">&lt;option&gt;</a><text>|#</text><a hover="Is a 4-bit unsigned immediate, in the range 0 to 15, encoded in the &quot;CRm&quot; field." link="option__2">&lt;imm&gt;</a><text>)</text></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="A64.control.barriers.DMB_BO_barriers" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">var types : <a link="type_MBReqTypes" file="shared_pseudocode.xml">MBReqTypes</a>;
case CRm[1:0] of
    when '00' =&gt; types = <a link="enum_MBReqTypes_All" file="shared_pseudocode.xml">MBReqTypes_All</a>;
    when '01' =&gt; types = <a link="enum_MBReqTypes_Reads" file="shared_pseudocode.xml">MBReqTypes_Reads</a>;
    when '10' =&gt; types = <a link="enum_MBReqTypes_Writes" file="shared_pseudocode.xml">MBReqTypes_Writes</a>;
    when '11' =&gt; types = <a link="enum_MBReqTypes_All" file="shared_pseudocode.xml">MBReqTypes_All</a>;
end;
</pstext></ps>
      </ps_section>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="DMB_BO_barriers" symboldefcount="1">
      <symbol link="CRm_option__3">&lt;option&gt;</symbol>
      <definition encodedin="CRm">
        <intro>
          <para>Specifies the limitation on the Memory Effects ordered by the barrier operation, and is encoded in &quot;CRm&quot;.</para>
          <para>For more information on whether a Memory Effect is before or after a barrier instruction,
see <xref linkend="BEIIECBH">Data Memory Barrier (DMB)</xref>.</para>
        </intro>
        <table class="valuetable">
          <tgroup cols="3">
            <thead>
              <row>
                <entry class="bitfield">CRm</entry>
                <entry class="symbol">&lt;option&gt;</entry>
                <entry class="symbol">Description</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry class="bitfield">xx00</entry>
                <entry class="symbol">RESERVED</entry>
                <entry class="description"/>
              </row>
              <row>
                <entry class="bitfield">0001</entry>
                <entry class="symbol">OSHLD</entry>
                <entry class="description">
                  <para>This option has the same behavior as LD and is deprecated.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">0010</entry>
                <entry class="symbol">OSHST</entry>
                <entry class="description">
                  <para>This option has the same behavior as ST and is deprecated.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">0011</entry>
                <entry class="symbol">OSH</entry>
                <entry class="description">
                  <para>This option has the same behavior as SY and is deprecated.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">0101</entry>
                <entry class="symbol">NSHLD</entry>
                <entry class="description">
                  <para>This option has the same behavior as LD and is deprecated.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">0110</entry>
                <entry class="symbol">NSHST</entry>
                <entry class="description">
                  <para>This option has the same behavior as ST and is deprecated.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">0111</entry>
                <entry class="symbol">NSH</entry>
                <entry class="description">
                  <para>This option has the same behavior as SY and is deprecated.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">1001</entry>
                <entry class="symbol">ISHLD</entry>
                <entry class="description">
                  <para>This option has the same behavior as LD and is deprecated.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">1010</entry>
                <entry class="symbol">ISHST</entry>
                <entry class="description">
                  <para>This option has the same behavior as ST and is deprecated.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">1011</entry>
                <entry class="symbol">ISH</entry>
                <entry class="description">
                  <para>This option has the same behavior as SY and is deprecated.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">1101</entry>
                <entry class="symbol">LD</entry>
                <entry class="description">
                  <para>Reads are the required access type before the barrier instruction.
Reads and writes are the required access types after the barrier instruction.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">1110</entry>
                <entry class="symbol">ST</entry>
                <entry class="description">
                  <para>Writes are the required access type, both before and after the
barrier instruction.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">1111</entry>
                <entry class="symbol">SY</entry>
                <entry class="description">
                  <para>Reads and writes are the required access types, both before and
after the barrier instruction.</para>
                </entry>
              </row>
            </tbody>
          </tgroup>
        </table>
        <after>All encodings of &quot;CRm&quot; that are listed as reserved can be encoded using the #&lt;imm&gt; syntax.
All reserved options have the same behavior as SY, but software must not rely on this behavior.</after>
      </definition>
    </explanation>
    <explanation enclist="DMB_BO_barriers" symboldefcount="1">
      <symbol link="option__2">&lt;imm&gt;</symbol>
      <account encodedin="CRm">
        <intro>
          <para>Is a 4-bit unsigned immediate, in the range 0 to 15, encoded in the &quot;CRm&quot; field.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
  <ps_section howmany="1">
    <ps name="A64.control.barriers.DMB_BO_barriers" sections="1" secttype="Operation">
      <pstext mayhavelinks="1" section="Execute" rep_section="execute">DataMemoryBarrier(types);</pstext></ps>
  </ps_section>
  <timestamp>2026-03-26 20:27:25</timestamp>
  <commit_id>2026-03_rel</commit_id>
</instructionsection>