<?xml version="1.0" ?><?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?><!DOCTYPE instructionsection  PUBLIC '-//ARM//DTD instructionsection //EN'  'iform-p.dtd'><!-- Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. --><!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. --><instructionsection id="EON" title="EON (shifted register) -- A64" type="instruction">
  <docvars>
    <docvar key="cond-setting" value="no-s"/>
    <docvar key="instr-class" value="general"/>
    <docvar key="isa" value="A64"/>
    <docvar key="mnemonic" value="EON"/>
    <docvar key="reguse" value="shifted-reg"/>
  </docvars>
  <heading>EON (shifted register)</heading>
  <desc>
    <brief>
      <para>Bitwise exclusive-OR NOT (shifted register)</para>
    </brief>
    <authored>
      <para>This instruction performs a bitwise exclusive-OR
NOT between a register value and an optionally-shifted
register value, and writes the result to the destination
register.</para>
    </authored>
  </desc>
  <operationalnotes>
    <operationalnote>
      <operationalnote_content>
        <para>This instruction is a data-independent-time instruction as described in <xref linkend="ARMARM_BEICCDDAB3">About PSTATE.DIT</xref>.</para>
      </operationalnote_content>
    </operationalnote>
  </operationalnotes>
  <alias_list howmany="0"/>
  <classes>
    <iclass name="Not setting the condition flags" oneof="1" id="iclass_not_setting_the_condition_flags" no_encodings="2" isa="A64">
      <docvars>
        <docvar key="cond-setting" value="no-s"/>
        <docvar key="instr-class" value="general"/>
        <docvar key="isa" value="A64"/>
        <docvar key="mnemonic" value="EON"/>
        <docvar key="reguse" value="shifted-reg"/>
      </docvars>
      <iclassintro count="2"/>
      <regdiagram form="32" psname="A64.dpreg.log_shift.EON_32_log_shift" tworows="1">
        <box hibit="31" width="1" name="sf" usename="1">
          <c colspan="1"/>
        </box>
        <box hibit="30" width="2" name="opc" usename="1" settings="2" psbits="xx">
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="28" width="5" settings="5">
          <c>0</c>
          <c>1</c>
          <c>0</c>
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="23" width="2" name="shift" usename="1">
          <c colspan="2"/>
        </box>
        <box hibit="21" name="N" usename="1" settings="1" psbits="x">
          <c>1</c>
        </box>
        <box hibit="20" width="5" name="Rm" usename="1">
          <c colspan="5"/>
        </box>
        <box hibit="15" width="6" name="imm6" usename="1">
          <c colspan="6"/>
        </box>
        <box hibit="9" width="5" name="Rn" usename="1">
          <c colspan="5"/>
        </box>
        <box hibit="4" width="5" name="Rd" usename="1">
          <c colspan="5"/>
        </box>
      </regdiagram>
      <encoding name="EON_32_log_shift" oneofinclass="2" oneof="2" label="32-bit" bitdiffs="sf == 0">
        <docvars>
          <docvar key="datatype" value="32"/>
          <docvar key="instr-class" value="general"/>
          <docvar key="isa" value="A64"/>
          <docvar key="cond-setting" value="no-s"/>
          <docvar key="datatype-reguse" value="32-shifted-reg"/>
          <docvar key="reguse" value="shifted-reg"/>
          <docvar key="mnemonic" value="EON"/>
        </docvars>
        <box hibit="31" width="1" name="sf">
          <c>0</c>
        </box>
        <asmtemplate><text>EON  </text><a hover="Is the 32-bit name of the general-purpose destination register, encoded in the &quot;Rd&quot; field." link="WdOrWZR">&lt;Wd&gt;</a><text>, </text><a hover="Is the 32-bit name of the first general-purpose source register, encoded in the &quot;Rn&quot; field." link="WnOrWZR__3">&lt;Wn&gt;</a><text>, </text><a hover="Is the 32-bit name of the second general-purpose source register, encoded in the &quot;Rm&quot; field." link="WmOrWZR__2">&lt;Wm&gt;</a><text>{, </text><a hover="Is the optional shift to be applied to the final source, defaulting to LSL and " link="shift_option__3">&lt;shift&gt;</a><text> #</text><a hover="For the &quot;32-bit&quot; variant: is the shift amount, in the range 0 to 31, defaulting to 0 and encoded in the &quot;imm6&quot; field." link="amount__5">&lt;amount&gt;</a><text>}</text></asmtemplate>
      </encoding>
      <encoding name="EON_64_log_shift" oneofinclass="2" oneof="2" label="64-bit" bitdiffs="sf == 1">
        <docvars>
          <docvar key="datatype" value="64"/>
          <docvar key="instr-class" value="general"/>
          <docvar key="isa" value="A64"/>
          <docvar key="cond-setting" value="no-s"/>
          <docvar key="datatype-reguse" value="64-shifted-reg"/>
          <docvar key="reguse" value="shifted-reg"/>
          <docvar key="mnemonic" value="EON"/>
        </docvars>
        <box hibit="31" width="1" name="sf">
          <c>1</c>
        </box>
        <asmtemplate><text>EON  </text><a hover="Is the 64-bit name of the general-purpose destination register, encoded in the &quot;Rd&quot; field." link="XdOrXZR__6">&lt;Xd&gt;</a><text>, </text><a hover="Is the 64-bit name of the first general-purpose source register, encoded in the &quot;Rn&quot; field." link="XnOrXZR__12">&lt;Xn&gt;</a><text>, </text><a hover="Is the 64-bit name of the second general-purpose source register, encoded in the &quot;Rm&quot; field." link="XmOrXZR__4">&lt;Xm&gt;</a><text>{, </text><a hover="Is the optional shift to be applied to the final source, defaulting to LSL and " link="shift_option__3">&lt;shift&gt;</a><text> #</text><a hover="For the &quot;64-bit&quot; variant: is the shift amount, in the range 0 to 63, defaulting to 0 and encoded in the &quot;imm6&quot; field." link="amount__6">&lt;amount&gt;</a><text>}</text></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="A64.dpreg.log_shift.EON_32_log_shift" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">if sf == '0' &amp;&amp; imm6[5] == '1' then <a link="func_EndOfDecode_1" file="shared_pseudocode.xml">EndOfDecode</a>(<a link="enum_Decode_UNDEF" file="shared_pseudocode.xml">Decode_UNDEF</a>); end;
let d : integer{} = UInt(Rd);
let n : integer{} = UInt(Rn);
let m : integer{} = UInt(Rm);
let datasize : integer{} = 32 &lt;&lt; UInt(sf);
let shift_type : <a link="type_ShiftType" file="shared_pseudocode.xml">ShiftType</a> = <a link="func_DecodeShift_1" file="shared_pseudocode.xml">DecodeShift</a>(shift);
let shift_amount : integer = UInt(imm6);</pstext></ps>
      </ps_section>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="EON_32_log_shift" symboldefcount="1">
      <symbol link="WdOrWZR">&lt;Wd&gt;</symbol>
      <account encodedin="Rd">
        <intro>
          <para>Is the 32-bit name of the general-purpose destination register, encoded in the &quot;Rd&quot; field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="EON_32_log_shift" symboldefcount="1">
      <symbol link="WnOrWZR__3">&lt;Wn&gt;</symbol>
      <account encodedin="Rn">
        <intro>
          <para>Is the 32-bit name of the first general-purpose source register, encoded in the &quot;Rn&quot; field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="EON_32_log_shift" symboldefcount="1">
      <symbol link="WmOrWZR__2">&lt;Wm&gt;</symbol>
      <account encodedin="Rm">
        <intro>
          <para>Is the 32-bit name of the second general-purpose source register, encoded in the &quot;Rm&quot; field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="EON_32_log_shift, EON_64_log_shift" symboldefcount="1">
      <symbol link="shift_option__3">&lt;shift&gt;</symbol>
      <definition encodedin="shift">
        <intro>Is the optional shift to be applied to the final source, defaulting to LSL and </intro>
        <table class="valuetable">
          <tgroup cols="2">
            <thead>
              <row>
                <entry class="bitfield">shift</entry>
                <entry class="symbol">&lt;shift&gt;</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry class="bitfield">00</entry>
                <entry class="symbol">LSL</entry>
              </row>
              <row>
                <entry class="bitfield">01</entry>
                <entry class="symbol">LSR</entry>
              </row>
              <row>
                <entry class="bitfield">10</entry>
                <entry class="symbol">ASR</entry>
              </row>
              <row>
                <entry class="bitfield">11</entry>
                <entry class="symbol">ROR</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </definition>
    </explanation>
    <explanation enclist="EON_32_log_shift" symboldefcount="1">
      <symbol link="amount__5">&lt;amount&gt;</symbol>
      <account encodedin="imm6">
        <intro>
          <para>For the &quot;32-bit&quot; variant: is the shift amount, in the range 0 to 31, defaulting to 0 and encoded in the &quot;imm6&quot; field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="EON_64_log_shift" symboldefcount="2">
      <symbol link="amount__6">&lt;amount&gt;</symbol>
      <account encodedin="imm6">
        <intro>
          <para>For the &quot;64-bit&quot; variant: is the shift amount, in the range 0 to 63, defaulting to 0 and encoded in the &quot;imm6&quot; field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="EON_64_log_shift" symboldefcount="1">
      <symbol link="XdOrXZR__6">&lt;Xd&gt;</symbol>
      <account encodedin="Rd">
        <intro>
          <para>Is the 64-bit name of the general-purpose destination register, encoded in the &quot;Rd&quot; field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="EON_64_log_shift" symboldefcount="1">
      <symbol link="XnOrXZR__12">&lt;Xn&gt;</symbol>
      <account encodedin="Rn">
        <intro>
          <para>Is the 64-bit name of the first general-purpose source register, encoded in the &quot;Rn&quot; field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="EON_64_log_shift" symboldefcount="1">
      <symbol link="XmOrXZR__4">&lt;Xm&gt;</symbol>
      <account encodedin="Rm">
        <intro>
          <para>Is the 64-bit name of the second general-purpose source register, encoded in the &quot;Rm&quot; field.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
  <ps_section howmany="1">
    <ps name="A64.dpreg.log_shift.EON_32_log_shift" sections="1" secttype="Operation">
      <pstext mayhavelinks="1" section="Execute" rep_section="execute">let operand1 : bits(datasize) = X{}(n);
let operand2 : bits(datasize) = ShiftReg{}(m, shift_type, shift_amount);

<a link="accessor_X_2" file="shared_pseudocode.xml">X</a>{datasize}(d) = operand1 XOR NOT(operand2);</pstext></ps>
  </ps_section>
  <timestamp>2026-03-26 20:27:25</timestamp>
  <commit_id>2026-03_rel</commit_id>
</instructionsection>