GCSSS1 Guarded Control Stack switch stack 1 This instruction validates that the stack being switched to contains a Valid GCS cap record, stores an In-progress GCS cap record to the stack that is being switched to, and sets the current GCS pointer register to the stack that is being switched to. If the instruction generates a synchronous Data Abort exception, Watchpoint exception, GPC exception, or GCS Data Check exception, the value of GCSPR_ELx for the current Exception level is restored to the value held in the register before the instruction was executed. For more information, see GCSSS1, Guarded Control Stack Switch Stack 1. SYS 1 1 0 1 0 1 0 1 0 0 0 0 1 0 1 1 0 1 1 1 0 1 1 1 0 1 0 GCSSS1 <Xt> SYS #3, C7, C7, #2, <Xt> Unconditionally <Xt> Is the 64-bit name of the general-purpose source register, encoded in the "Rt" field. 2026-03-26 20:27:25 2026-03_rel