<?xml version="1.0" ?><?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?><!DOCTYPE instructionsection  PUBLIC '-//ARM//DTD instructionsection //EN'  'iform-p.dtd'><!-- Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. --><!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. --><instructionsection id="ISB" title="ISB -- A64" type="instruction">
  <docvars>
    <docvar key="instr-class" value="system"/>
    <docvar key="isa" value="A64"/>
    <docvar key="mnemonic" value="ISB"/>
  </docvars>
  <heading>ISB</heading>
  <desc>
    <brief>
      <para>Instruction synchronization barrier</para>
    </brief>
    <authored>
      <para>This instruction flushes the pipeline in the PE
and is a context synchronization event. For more information, see
<xref linkend="ARMARM_BEIJADJC">Instruction Synchronization Barrier (ISB)</xref>.</para>
    </authored>
  </desc>
  <alias_list howmany="0"/>
  <classes>
    <iclass name="System" oneof="1" id="iclass_system" no_encodings="1" isa="A64">
      <docvars>
        <docvar key="instr-class" value="system"/>
        <docvar key="isa" value="A64"/>
        <docvar key="mnemonic" value="ISB"/>
      </docvars>
      <iclassintro count="1"/>
      <regdiagram form="32" psname="A64.control.barriers.ISB_BI_barriers" tworows="1">
        <box hibit="31" width="3" settings="3">
          <c>1</c>
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="28" width="3" settings="3">
          <c>1</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="25" width="14" settings="14">
          <c>0</c>
          <c>1</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>1</c>
          <c>1</c>
          <c>0</c>
          <c>0</c>
          <c>1</c>
          <c>1</c>
        </box>
        <box hibit="11" width="4" name="CRm" usename="1">
          <c colspan="4"/>
        </box>
        <box hibit="7" width="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="6" width="2" name="opc" usename="1" settings="2" psbits="xx">
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="4" width="5" name="Rt" usename="1" settings="5" psbits="xxxxx">
          <c>1</c>
          <c>1</c>
          <c>1</c>
          <c>1</c>
          <c>1</c>
        </box>
      </regdiagram>
      <encoding name="ISB_BI_barriers" oneofinclass="1" oneof="1" label="">
        <docvars>
          <docvar key="instr-class" value="system"/>
          <docvar key="isa" value="A64"/>
          <docvar key="mnemonic" value="ISB"/>
        </docvars>
        <asmtemplate><text>ISB  {</text><a hover="Specifies an optional limitation on the barrier operation. Values are:


SY
: Full system barrier operation, encoded as CRm = 0b1111. Can be omitted.


All other encodings of &quot;CRm&quot; are reserved. The corresponding instructions execute as full system barrier operations, but must not be relied upon by software." link="CRm_SY__2">&lt;option&gt;</a><text>|#</text><a hover="Is an optional 4-bit unsigned immediate, in the range 0 to 15, defaulting to 15 and encoded in the &quot;CRm&quot; field." link="option">&lt;imm&gt;</a><text>}</text></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="A64.control.barriers.ISB_BI_barriers" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">// no additional decoding required</pstext></ps>
      </ps_section>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="ISB_BI_barriers" symboldefcount="1">
      <symbol link="CRm_SY__2">&lt;option&gt;</symbol>
      <account encodedin="CRm">
        <intro>
          <para>Specifies an optional limitation on the barrier operation. Values are:</para>
          <list type="param">
            <listitem>
              <param>SY</param>
              <content>Full system barrier operation, encoded as CRm = <binarynumber>0b1111</binarynumber>. Can be omitted.</content>
            </listitem>
          </list>
          <para>All other encodings of &quot;CRm&quot; are reserved. The corresponding instructions execute as full system barrier operations, but must not be relied upon by software.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="ISB_BI_barriers" symboldefcount="1">
      <symbol link="option">&lt;imm&gt;</symbol>
      <account encodedin="CRm">
        <intro>
          <para>Is an optional 4-bit unsigned immediate, in the range 0 to 15, defaulting to 15 and encoded in the &quot;CRm&quot; field.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
  <ps_section howmany="1">
    <ps name="A64.control.barriers.ISB_BI_barriers" sections="1" secttype="Operation">
      <pstext mayhavelinks="1" section="Execute" rep_section="execute">InstructionSynchronizationBarrier();

if IsFeatureImplemented(FEAT_BRBE) &amp;&amp; <a link="func_BRBEBranchOnISB_0" file="shared_pseudocode.xml">BRBEBranchOnISB</a>() then
    <a link="func_BRBEISB_0" file="shared_pseudocode.xml">BRBEISB</a>();
end;</pstext></ps>
  </ps_section>
  <timestamp>2026-03-26 20:27:25</timestamp>
  <commit_id>2026-03_rel</commit_id>
</instructionsection>