LDAPR
Load-acquire RCpc register
This instruction derives an address from a base register
value, loads a 32-bit word or 64-bit doubleword from the derived
address in memory, and writes it to a register.
If the destination register is not one of WZR or XZR, LDAPR loads from memory with AcquirePC semantics.
For more information about memory ordering semantics, see Load-Acquire, Load-AcquirePC, and Store-Release.
For information about addressing modes, see
Load/Store addressing modes.
This instruction is a data-independent-time instruction as described in About PSTATE.DIT.
It has encodings from 2 classes:
Post-index
and
No offset
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LDAPR <Wt>, [<Xn|SP>], #4
1
LDAPR <Xt>, [<Xn|SP>], #8
if !IsFeatureImplemented(FEAT_LRCPC3) then EndOfDecode(Decode_UNDEF); end;
let t : integer{} = UInt(Rt);
let n : integer{} = UInt(Rn);
var wback : boolean = TRUE;
let acquirepc : boolean = TRUE;
let regsize : integer{} = if size == '11' then 64 else 32;
let datasize : integer{} = 8 << UInt(size);
let offset : integer = 1 << UInt(size);
let tagchecked : boolean = TRUE;
var wb_unknown : boolean = FALSE;
if n == t && n != 31 then
let c : Constraint = ConstrainUnpredictable(Unpredictable_WBOVERLAPLD);
assert c IN {Constraint_WBSUPPRESS, Constraint_UNKNOWN, Constraint_UNDEF, Constraint_NOP};
case c of
when Constraint_WBSUPPRESS => wback = FALSE; // writeback is suppressed
when Constraint_UNKNOWN => wb_unknown = TRUE; // writeback is UNKNOWN
when Constraint_UNDEF => EndOfDecode(Decode_UNDEF);
when Constraint_NOP => EndOfDecode(Decode_NOP);
end;
end;
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(1)
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LDAPR <Wt>, [<Xn|SP> {, #0}]
1
LDAPR <Xt>, [<Xn|SP> {, #0}]
if !IsFeatureImplemented(FEAT_LRCPC) then EndOfDecode(Decode_UNDEF); end;
let t : integer{} = UInt(Rt);
let n : integer{} = UInt(Rn);
let wback : boolean = FALSE;
let offset : integer = 0;
let wb_unknown : boolean = FALSE;
let elsize : integer{} = 8 << UInt(size);
let regsize : integer{} = if elsize == 64 then 64 else 32;
let datasize : integer{} = elsize;
let acquirepc : boolean = TRUE;
let tagchecked : boolean = n != 31;
<Wt>
Is the 32-bit name of the general-purpose register to be loaded, encoded in the "Rt" field.
<Xn|SP>
Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field.
<Xt>
Is the 64-bit name of the general-purpose register to be loaded, encoded in the "Rt" field.
var address : bits(64);
var data : bits(datasize);
let dbytes : integer{} = datasize DIV 8;
let accdesc : AccessDescriptor = CreateAccDescLDAcqPC(tagchecked, acquirepc, t);
if n == 31 then
CheckSPAlignment();
address = SP{64}();
else
address = X{64}(n);
end;
data = Mem{datasize}(address, accdesc);
X{regsize}(t) = ZeroExtend{regsize}(data);
if wback then
if wb_unknown then
address = ARBITRARY : bits(64);
else
address = AddressAdd(address, offset, accdesc);
end;
if n == 31 then
SP{64}() = address;
else
X{64}(n) = address;
end;
end;
2026-03-26 20:27:25
2026-03_rel