<?xml version="1.0" ?><?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?><!DOCTYPE instructionsection  PUBLIC '-//ARM//DTD instructionsection //EN'  'iform-p.dtd'><!-- Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. --><!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. --><instructionsection id="LSL_UBFM" title="LSL (immediate) -- A64" type="alias">
  <docvars>
    <docvar key="alias_mnemonic" value="LSL"/>
    <docvar key="bitfield-fill" value="zero-fill"/>
    <docvar key="instr-class" value="general"/>
    <docvar key="isa" value="A64"/>
    <docvar key="mnemonic" value="UBFM"/>
  </docvars>
  <heading>LSL (immediate)</heading>
  <desc>
    <brief>
      <para>Logical shift left (immediate)</para>
    </brief>
    <authored>
      <para>This instruction shifts a register value left by an immediate
number of bits, shifting in zeros, and writes the result to the destination
register.</para>
    </authored>
  </desc>
  <operationalnotes/>
  <aliasto refiform="ubfm.xml" iformid="UBFM">UBFM</aliasto>
  <classes>
    <iclass name="With zeros to left and right" oneof="1" id="iclass_with_zeros_to_left_and_right" no_encodings="2" isa="A64">
      <docvars>
        <docvar key="bitfield-fill" value="zero-fill"/>
        <docvar key="instr-class" value="general"/>
        <docvar key="isa" value="A64"/>
        <docvar key="mnemonic" value="UBFM"/>
      </docvars>
      <iclassintro count="2"/>
      <regdiagram form="32" psname="A64.dpimm.bitfield.UBFM_32M_bitfield.LSL" tworows="1">
        <box hibit="31" width="1" name="sf" usename="1">
          <c colspan="1"/>
        </box>
        <box hibit="30" width="2" name="opc" usename="1" settings="2" psbits="xx">
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="28" width="6" settings="6">
          <c>1</c>
          <c>0</c>
          <c>0</c>
          <c>1</c>
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="22" width="1" name="N" usename="1">
          <c colspan="1"/>
        </box>
        <box hibit="21" width="6" name="immr" usename="1">
          <c colspan="6"/>
        </box>
        <box hibit="15" width="6" name="imms" usename="1" psbits="xxxxxx">
          <c colspan="6"/>
        </box>
        <box hibit="9" width="5" name="Rn" usename="1">
          <c colspan="5"/>
        </box>
        <box hibit="4" width="5" name="Rd" usename="1">
          <c colspan="5"/>
        </box>
      </regdiagram>
      <encoding name="LSL_UBFM_32M_bitfield" oneofinclass="2" oneof="2" label="32-bit" bitdiffs="sf == 0 &amp;&amp; N == 0 &amp;&amp; imms != 011111">
        <docvars>
          <docvar key="bitfield-fill" value="zero-fill"/>
          <docvar key="datatype" value="32"/>
          <docvar key="instr-class" value="general"/>
          <docvar key="isa" value="A64"/>
          <docvar key="mnemonic" value="UBFM"/>
          <docvar key="alias_mnemonic" value="LSL"/>
        </docvars>
        <box hibit="31" width="1" name="sf">
          <c>0</c>
        </box>
        <box hibit="22" width="1" name="N">
          <c>0</c>
        </box>
        <box hibit="15" width="6" name="imms">
          <c>Z</c>
          <c>N</c>
          <c>N</c>
          <c>N</c>
          <c>N</c>
          <c>N</c>
        </box>
        <asmtemplate><text>LSL  </text><a hover="Is the 32-bit name of the general-purpose destination register, encoded in the &quot;Rd&quot; field." link="WdOrWZR">&lt;Wd&gt;</a><text>, </text><a hover="Is the 32-bit name of the general-purpose source register, encoded in the &quot;Rn&quot; field." link="WnOrWZR">&lt;Wn&gt;</a><text>, #</text><a hover="For the &quot;32-bit&quot; variant: is the shift amount, in the range 0 to 31." link="shift__2">&lt;shift&gt;</a></asmtemplate>
        <equivalent_to>
          <asmtemplate><a href="ubfm.xml#UBFM_32M_bitfield">UBFM</a><text>  </text><a hover="Is the 32-bit name of the general-purpose destination register, encoded in the &quot;Rd&quot; field." href="ubfm.xml#WdOrWZR">&lt;Wd&gt;</a><text>, </text><a hover="Is the 32-bit name of the general-purpose source register, encoded in the &quot;Rn&quot; field." href="ubfm.xml#WnOrWZR">&lt;Wn&gt;</a><text>, #(-</text><a hover="For the &quot;32-bit&quot; variant: is the shift amount, in the range 0 to 31." href="ubfm.xml#shift__2">&lt;shift&gt;</a><text>  MOD  32), #(31-</text><a hover="For the &quot;32-bit&quot; variant: is the shift amount, in the range 0 to 31." href="ubfm.xml#shift__2">&lt;shift&gt;</a><text>)</text></asmtemplate>
          <aliascond>UInt(imms) + 1 == UInt(immr)</aliascond>
        </equivalent_to>
      </encoding>
      <encoding name="LSL_UBFM_64M_bitfield" oneofinclass="2" oneof="2" label="64-bit" bitdiffs="sf == 1 &amp;&amp; N == 1 &amp;&amp; imms != 111111">
        <docvars>
          <docvar key="bitfield-fill" value="zero-fill"/>
          <docvar key="datatype" value="64"/>
          <docvar key="instr-class" value="general"/>
          <docvar key="isa" value="A64"/>
          <docvar key="mnemonic" value="UBFM"/>
          <docvar key="alias_mnemonic" value="LSL"/>
        </docvars>
        <box hibit="31" width="1" name="sf">
          <c>1</c>
        </box>
        <box hibit="22" width="1" name="N">
          <c>1</c>
        </box>
        <box hibit="15" width="6" name="imms">
          <c>N</c>
          <c>N</c>
          <c>N</c>
          <c>N</c>
          <c>N</c>
          <c>N</c>
        </box>
        <asmtemplate><text>LSL  </text><a hover="Is the 64-bit name of the general-purpose destination register, encoded in the &quot;Rd&quot; field." link="XdOrXZR__6">&lt;Xd&gt;</a><text>, </text><a hover="Is the 64-bit name of the general-purpose source register, encoded in the &quot;Rn&quot; field." link="XnOrXZR__11">&lt;Xn&gt;</a><text>, #</text><a hover="For the &quot;64-bit&quot; variant: is the shift amount, in the range 0 to 63." link="shift__4">&lt;shift&gt;</a></asmtemplate>
        <equivalent_to>
          <asmtemplate><a href="ubfm.xml#UBFM_64M_bitfield">UBFM</a><text>  </text><a hover="Is the 64-bit name of the general-purpose destination register, encoded in the &quot;Rd&quot; field." href="ubfm.xml#XdOrXZR__6">&lt;Xd&gt;</a><text>, </text><a hover="Is the 64-bit name of the general-purpose source register, encoded in the &quot;Rn&quot; field." href="ubfm.xml#XnOrXZR__11">&lt;Xn&gt;</a><text>, #(-</text><a hover="For the &quot;64-bit&quot; variant: is the shift amount, in the range 0 to 63." href="ubfm.xml#shift__4">&lt;shift&gt;</a><text>  MOD  64), #(63-</text><a hover="For the &quot;64-bit&quot; variant: is the shift amount, in the range 0 to 63." href="ubfm.xml#shift__4">&lt;shift&gt;</a><text>)</text></asmtemplate>
          <aliascond>UInt(imms) + 1 == UInt(immr)</aliascond>
        </equivalent_to>
      </encoding>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="LSL_UBFM_32M_bitfield" symboldefcount="1">
      <symbol link="WdOrWZR">&lt;Wd&gt;</symbol>
      <account encodedin="Rd">
        <intro>
          <para>Is the 32-bit name of the general-purpose destination register, encoded in the &quot;Rd&quot; field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="LSL_UBFM_32M_bitfield" symboldefcount="1">
      <symbol link="WnOrWZR">&lt;Wn&gt;</symbol>
      <account encodedin="Rn">
        <intro>
          <para>Is the 32-bit name of the general-purpose source register, encoded in the &quot;Rn&quot; field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="LSL_UBFM_32M_bitfield" symboldefcount="1">
      <symbol link="shift__2">&lt;shift&gt;</symbol>
      <account encodedin="immr">
        <intro>
          <para>For the &quot;32-bit&quot; variant: is the shift amount, in the range 0 to 31.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="LSL_UBFM_64M_bitfield" symboldefcount="2">
      <symbol link="shift__4">&lt;shift&gt;</symbol>
      <account encodedin="immr">
        <intro>
          <para>For the &quot;64-bit&quot; variant: is the shift amount, in the range 0 to 63.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="LSL_UBFM_64M_bitfield" symboldefcount="1">
      <symbol link="XdOrXZR__6">&lt;Xd&gt;</symbol>
      <account encodedin="Rd">
        <intro>
          <para>Is the 64-bit name of the general-purpose destination register, encoded in the &quot;Rd&quot; field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="LSL_UBFM_64M_bitfield" symboldefcount="1">
      <symbol link="XnOrXZR__11">&lt;Xn&gt;</symbol>
      <account encodedin="Rn">
        <intro>
          <para>Is the 64-bit name of the general-purpose source register, encoded in the &quot;Rn&quot; field.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
  <timestamp>2026-03-26 20:27:25</timestamp>
  <commit_id>2026-03_rel</commit_id>
</instructionsection>