<?xml version="1.0" ?><?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?><!DOCTYPE instructionsection  PUBLIC '-//ARM//DTD instructionsection //EN'  'iform-p.dtd'><!-- Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. --><!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. --><instructionsection id="LUTI2_advsimd" title="LUTI2 -- A64" type="instruction">
  <docvars>
    <docvar key="instr-class" value="advsimd"/>
    <docvar key="isa" value="A64"/>
    <docvar key="mnemonic" value="LUTI2"/>
  </docvars>
  <heading>LUTI2</heading>
  <desc>
    <brief>
      <para>Lookup table read with 2-bit indices</para>
    </brief>
    <authored>
      <para>This instruction copies indexed 8-bit or 16-bit elements from the table vector
to the destination vector using packed 2-bit indices from a segment of the
source vector. A segment corresponds to a portion of the source vector
that is consumed in order to fill the destination vector. The segment is selected
by the vector segment index.</para>
    </authored>
  </desc>
  <operationalnotes>
    <operationalnote>
      <operationalnote_content>
        <para>This instruction is a data-independent-time instruction as described in <xref linkend="ARMARM_BEICCDDAB3">About PSTATE.DIT</xref>.</para>
      </operationalnote_content>
    </operationalnote>
  </operationalnotes>
  <alias_list howmany="0"/>
  <classes>
    <iclass name="Advanced SIMD" oneof="1" id="iclass_advanced_simd" no_encodings="2" isa="A64">
      <docvars>
        <docvar key="instr-class" value="advsimd"/>
        <docvar key="isa" value="A64"/>
        <docvar key="mnemonic" value="LUTI2"/>
      </docvars>
      <iclassintro count="2"/>
      <arch_variants>
        <arch_variant feature="FEAT_AdvSIMD &amp;&amp; FEAT_LUT" name="v8Ap0 &amp;&amp; v9Ap5"/>
      </arch_variants>
      <regdiagram form="32" psname="A64.simd_dp.asimdtbl.LUTI2_asimdtbl_L5" tworows="1">
        <box hibit="31" width="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="30" name="Q" usename="1" settings="1" psbits="x">
          <c>1</c>
        </box>
        <box hibit="29" width="6" settings="6">
          <c>0</c>
          <c>0</c>
          <c>1</c>
          <c>1</c>
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="23" width="2" name="op2" usename="1" settings="1" psbits="xx">
          <c>1</c>
          <c>x</c>
        </box>
        <box hibit="21" width="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="20" width="5" name="Rm" usename="1">
          <c colspan="5"/>
        </box>
        <box hibit="15" width="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="14" width="2" name="len" usename="1">
          <c colspan="2"/>
        </box>
        <box hibit="12" width="1" name="op" usename="1">
          <c colspan="1"/>
        </box>
        <box hibit="11" width="2" settings="2">
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="9" width="5" name="Rn" usename="1">
          <c colspan="5"/>
        </box>
        <box hibit="4" width="5" name="Rd" usename="1">
          <c colspan="5"/>
        </box>
      </regdiagram>
      <encoding name="LUTI2_asimdtbl_L5" oneofinclass="2" oneof="2" label="Byte" bitdiffs="op2 == 10 &amp;&amp; op == 1">
        <docvars>
          <docvar key="instr-class" value="advsimd"/>
          <docvar key="isa" value="A64"/>
          <docvar key="simd-luti" value="simd-byte"/>
          <docvar key="mnemonic" value="LUTI2"/>
        </docvars>
        <box hibit="23" width="2" name="op2">
          <c/>
          <c>0</c>
        </box>
        <box hibit="12" width="1" name="op">
          <c>1</c>
        </box>
        <asmtemplate><text>LUTI2  </text><a hover="Is the name of the SIMD&amp;FP destination register, encoded in the &quot;Rd&quot; field." link="Vd">&lt;Vd&gt;</a><text>.16B, { </text><a hover="For the &quot;Single register table&quot; variant: is the name of the SIMD&amp;FP table register, encoded in the &quot;Rn&quot; field." link="Vn__3">&lt;Vn&gt;</a><text>.16B }, </text><a hover="Is the name of the SIMD&amp;FP source register, encoded in the &quot;Rm&quot; field." link="Vm__4">&lt;Vm&gt;</a><text>[</text><a hover="For the &quot;Byte&quot; variant: is the vector segment index, in the range 0 to 3, encoded in the &quot;len&quot; field." link="index__9">&lt;index&gt;</a><text>]</text></asmtemplate>
      </encoding>
      <encoding name="LUTI2_asimdtbl_L6" oneofinclass="2" oneof="2" label="Halfword" bitdiffs="op2 == 11">
        <docvars>
          <docvar key="instr-class" value="advsimd"/>
          <docvar key="isa" value="A64"/>
          <docvar key="simd-luti" value="simd-hword"/>
          <docvar key="mnemonic" value="LUTI2"/>
        </docvars>
        <box hibit="23" width="2" name="op2">
          <c/>
          <c>1</c>
        </box>
        <asmtemplate><text>LUTI2  </text><a hover="Is the name of the SIMD&amp;FP destination register, encoded in the &quot;Rd&quot; field." link="Vd">&lt;Vd&gt;</a><text>.8H, { </text><a hover="For the &quot;Single register table&quot; variant: is the name of the SIMD&amp;FP table register, encoded in the &quot;Rn&quot; field." link="Vn__3">&lt;Vn&gt;</a><text>.8H }, </text><a hover="Is the name of the SIMD&amp;FP source register, encoded in the &quot;Rm&quot; field." link="Vm__4">&lt;Vm&gt;</a><text>[</text><a hover="For the &quot;Halfword&quot; variant: is the vector segment index, in the range 0 to 7, encoded in the &quot;len:op&quot; fields." link="len_op">&lt;index&gt;</a><text>]</text></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="A64.simd_dp.asimdtbl.LUTI2_asimdtbl_L5" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">if !IsFeatureImplemented(FEAT_AdvSIMD) || !IsFeatureImplemented(FEAT_LUT) then
    <a link="func_EndOfDecode_1" file="shared_pseudocode.xml">EndOfDecode</a>(<a link="enum_Decode_UNDEF" file="shared_pseudocode.xml">Decode_UNDEF</a>);
end;
if op2 == '10' &amp;&amp; op == '0' then <a link="func_EndOfDecode_1" file="shared_pseudocode.xml">EndOfDecode</a>(<a link="enum_Decode_UNDEF" file="shared_pseudocode.xml">Decode_UNDEF</a>); end;

let d : integer{} = UInt(Rd);
let n : integer{} = UInt(Rn);
let m : integer{} = UInt(Rm);
let isize : integer{} = 2;
let esize : integer{} = if op2 == '10' then 8 else 16;
let part : integer = if op2 == '10' then UInt(len) else UInt(len::op);</pstext></ps>
      </ps_section>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="LUTI2_asimdtbl_L5, LUTI2_asimdtbl_L6" symboldefcount="1">
      <symbol link="Vd">&lt;Vd&gt;</symbol>
      <account encodedin="Rd">
        <intro>
          <para>Is the name of the SIMD&amp;FP destination register, encoded in the &quot;Rd&quot; field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="LUTI2_asimdtbl_L5, LUTI2_asimdtbl_L6" symboldefcount="1">
      <symbol link="Vn__3">&lt;Vn&gt;</symbol>
      <account encodedin="Rn">
        <intro>
          <para>Is the name of the SIMD&amp;FP table register, encoded in the &quot;Rn&quot; field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="LUTI2_asimdtbl_L5, LUTI2_asimdtbl_L6" symboldefcount="1">
      <symbol link="Vm__4">&lt;Vm&gt;</symbol>
      <account encodedin="Rm">
        <intro>
          <para>Is the name of the SIMD&amp;FP source register, encoded in the &quot;Rm&quot; field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="LUTI2_asimdtbl_L5" symboldefcount="1">
      <symbol link="index__9">&lt;index&gt;</symbol>
      <account encodedin="len">
        <intro>
          <para>For the &quot;Byte&quot; variant: is the vector segment index, in the range 0 to 3, encoded in the &quot;len&quot; field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="LUTI2_asimdtbl_L6" symboldefcount="2">
      <symbol link="len_op">&lt;index&gt;</symbol>
      <account encodedin="(len :: op)">
        <intro>
          <para>For the &quot;Halfword&quot; variant: is the vector segment index, in the range 0 to 7, encoded in the &quot;len:op&quot; fields.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
  <ps_section howmany="1">
    <ps name="A64.simd_dp.asimdtbl.LUTI2_asimdtbl_L5" sections="1" secttype="Operation">
      <pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="func_AArch64_CheckFPAdvSIMDEnabled_0" file="shared_pseudocode.xml">AArch64_CheckFPAdvSIMDEnabled</a>();
let elements : integer = 128 DIV esize;
let ibase : integer = elements * part;
let indices : bits(128) = V{}(m);
let table : bits(128)   = V{}(n);
var result : bits(128);

for e = 0 to elements-1 do
    let index : integer = UInt(indices[(ibase + e)*:isize]);
    result[e*:esize] = table[index*:esize];
end;

<a link="accessor_V_2" file="shared_pseudocode.xml">V</a>{128}(d) = result;</pstext></ps>
  </ps_section>
  <timestamp>2026-03-26 20:27:25</timestamp>
  <commit_id>2026-03_rel</commit_id>
</instructionsection>