<?xml version="1.0" ?><?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?><!DOCTYPE instructionsection  PUBLIC '-//ARM//DTD instructionsection //EN'  'iform-p.dtd'><!-- Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. --><!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. --><instructionsection id="RET" title="RET -- A64" type="instruction">
  <docvars>
    <docvar key="instr-class" value="general"/>
    <docvar key="isa" value="A64"/>
    <docvar key="mnemonic" value="RET"/>
  </docvars>
  <heading>RET</heading>
  <desc>
    <brief>
      <para>Return from subroutine</para>
    </brief>
    <authored>
      <para>This instruction branches unconditionally to an address in a register.
This instruction provides a hint that this is a subroutine return.</para>
    </authored>
  </desc>
  <alias_list howmany="0"/>
  <classes>
    <iclass name="Integer" oneof="1" id="iclass_integer" no_encodings="1" isa="A64">
      <docvars>
        <docvar key="instr-class" value="general"/>
        <docvar key="isa" value="A64"/>
        <docvar key="mnemonic" value="RET"/>
      </docvars>
      <iclassintro count="1"/>
      <regdiagram form="32" psname="A64.control.branch_reg.RET_64R_branch_reg" tworows="1">
        <box hibit="31" width="3" settings="3">
          <c>1</c>
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="28" width="3" settings="3">
          <c>1</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="25" width="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="24" name="Z" usename="1" settings="1" psbits="x">
          <c>0</c>
        </box>
        <box hibit="23" width="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="22" width="2" name="op" usename="1" settings="2" psbits="xx">
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="20" width="5" name="op2" usename="1" settings="5" psbits="xxxxx">
          <c>1</c>
          <c>1</c>
          <c>1</c>
          <c>1</c>
          <c>1</c>
        </box>
        <box hibit="15" width="4" settings="4">
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="11" name="A" usename="1" settings="1" psbits="x">
          <c>0</c>
        </box>
        <box hibit="10" name="M" usename="1" settings="1" psbits="x">
          <c>0</c>
        </box>
        <box hibit="9" width="5" name="Rn" usename="1">
          <c colspan="5"/>
        </box>
        <box hibit="4" width="5" name="Rm" usename="1" settings="5" psbits="xxxxx">
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
        </box>
      </regdiagram>
      <encoding name="RET_64R_branch_reg" oneofinclass="1" oneof="1" label="">
        <docvars>
          <docvar key="instr-class" value="general"/>
          <docvar key="isa" value="A64"/>
          <docvar key="mnemonic" value="RET"/>
        </docvars>
        <asmtemplate><text>RET  {</text><a hover="Is the 64-bit name of the general-purpose register holding the address to be branched to, encoded in the &quot;Rn&quot; field. Defaults to X30 if absent." link="Xn">&lt;Xn&gt;</a><text>}</text></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="A64.control.branch_reg.RET_64R_branch_reg" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">let n : integer{} = UInt(Rn);</pstext></ps>
      </ps_section>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="RET_64R_branch_reg" symboldefcount="1">
      <symbol link="Xn">&lt;Xn&gt;</symbol>
      <account encodedin="Rn">
        <intro>
          <para>Is the 64-bit name of the general-purpose register holding the address to be branched to, encoded in the &quot;Rn&quot; field. Defaults to X30 if absent.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
  <ps_section howmany="1">
    <ps name="A64.control.branch_reg.RET_64R_branch_reg" sections="1" secttype="Operation">
      <pstext mayhavelinks="1" section="Execute" rep_section="execute">var target : bits(64) = X{}(n);
if IsFeatureImplemented(FEAT_GCS) &amp;&amp; <a link="func_GCSPCREnabled_1" file="shared_pseudocode.xml">GCSPCREnabled</a>(<a link="global_PSTATE" file="shared_pseudocode.xml">PSTATE</a>.EL) then
    target = <a link="func_LoadCheckGCSRecord_2" file="shared_pseudocode.xml">LoadCheckGCSRecord</a>(target, <a link="enum_GCSInstType_PRET" file="shared_pseudocode.xml">GCSInstType_PRET</a>);
    <a link="func_SetCurrentGCSPointer_1" file="shared_pseudocode.xml">SetCurrentGCSPointer</a>(<a link="func_GetCurrentGCSPointer_0" file="shared_pseudocode.xml">GetCurrentGCSPointer</a>() + 8);
end;

// Value in BTypeNext will be used to set PSTATE.BTYPE
<a link="global_BTypeNext" file="shared_pseudocode.xml">BTypeNext</a> = '00';

let branch_conditional : boolean = FALSE;
<a link="func_BranchTo_4" file="shared_pseudocode.xml">BranchTo</a>{64}(target, <a link="enum_BranchType_RET" file="shared_pseudocode.xml">BranchType_RET</a>, branch_conditional);</pstext></ps>
  </ps_section>
  <timestamp>2026-03-26 20:27:25</timestamp>
  <commit_id>2026-03_rel</commit_id>
</instructionsection>