<?xml version="1.0" ?><?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?><!DOCTYPE instructionsection  PUBLIC '-//ARM//DTD instructionsection //EN'  'iform-p.dtd'><!-- Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. --><!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. --><instructionsection id="REV64_REV" title="REV64 -- A64" type="alias">
  <docvars>
    <docvar key="alias_mnemonic" value="REV64"/>
    <docvar key="datatype" value="64"/>
    <docvar key="instr-class" value="general"/>
    <docvar key="isa" value="A64"/>
    <docvar key="mnemonic" value="REV"/>
  </docvars>
  <heading>REV64</heading>
  <desc>
    <brief>
      <para>Reverse bytes</para>
    </brief>
    <authored>
      <para>This instruction reverses the byte order in a 64-bit general-purpose
register.</para>
      <para>When assembling for Armv8.2, an assembler must support this pseudo-instruction. It is <arm-defined-word>OPTIONAL</arm-defined-word> whether an assembler supports this pseudo-instruction when assembling for an architecture earlier than Armv8.2.</para>
    </authored>
  </desc>
  <operationalnotes/>
  <aliasto refiform="rev.xml" iformid="REV">REV</aliasto>
  <classes>
    <iclass name="Integer" oneof="1" id="iclass_integer" no_encodings="1" isa="A64">
      <docvars>
        <docvar key="datatype" value="64"/>
        <docvar key="instr-class" value="general"/>
        <docvar key="isa" value="A64"/>
        <docvar key="mnemonic" value="REV"/>
      </docvars>
      <iclassintro count="1"/>
      <regdiagram form="32" psname="A64.dpreg.dp_1src.REV_64_dp_1src.REV64" tworows="1">
        <box hibit="31" name="sf" usename="1" settings="1" psbits="x">
          <c>1</c>
        </box>
        <box hibit="30" width="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="29" name="S" usename="1" settings="1" psbits="x">
          <c>0</c>
        </box>
        <box hibit="28" width="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="27" width="3" settings="3">
          <c>1</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="24" width="4" settings="4">
          <c>0</c>
          <c>1</c>
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="20" width="5" name="opcode2" usename="1" settings="5" psbits="xxxxx">
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="15" width="4" settings="4">
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="11" width="2" name="opc" usename="1" settings="2" psbits="xx">
          <c>1</c>
          <c>1</c>
        </box>
        <box hibit="9" width="5" name="Rn" usename="1">
          <c colspan="5"/>
        </box>
        <box hibit="4" width="5" name="Rd" usename="1">
          <c colspan="5"/>
        </box>
      </regdiagram>
      <encoding name="REV64_REV_64_dp_1src" oneofinclass="1" oneof="1" label="">
        <docvars>
          <docvar key="datatype" value="64"/>
          <docvar key="instr-class" value="general"/>
          <docvar key="isa" value="A64"/>
          <docvar key="mnemonic" value="REV"/>
          <docvar key="alias_mnemonic" value="REV64"/>
        </docvars>
        <asmtemplate><text>REV64  </text><a hover="Is the 64-bit name of the general-purpose destination register, encoded in the &quot;Rd&quot; field." link="XdOrXZR__6">&lt;Xd&gt;</a><text>, </text><a hover="Is the 64-bit name of the general-purpose source register, encoded in the &quot;Rn&quot; field." link="XnOrXZR__11">&lt;Xn&gt;</a></asmtemplate>
        <equivalent_to>
          <asmtemplate><a href="rev.xml#REV_64_dp_1src">REV</a><text>  </text><a hover="Is the 64-bit name of the general-purpose destination register, encoded in the &quot;Rd&quot; field." href="rev.xml#XdOrXZR__6">&lt;Xd&gt;</a><text>, </text><a hover="Is the 64-bit name of the general-purpose source register, encoded in the &quot;Rn&quot; field." href="rev.xml#XnOrXZR__11">&lt;Xn&gt;</a></asmtemplate>
          <aliascond>Never</aliascond>
        </equivalent_to>
      </encoding>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="REV64_REV_64_dp_1src" symboldefcount="1">
      <symbol link="XdOrXZR__6">&lt;Xd&gt;</symbol>
      <account encodedin="Rd">
        <intro>
          <para>Is the 64-bit name of the general-purpose destination register, encoded in the &quot;Rd&quot; field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="REV64_REV_64_dp_1src" symboldefcount="1">
      <symbol link="XnOrXZR__11">&lt;Xn&gt;</symbol>
      <account encodedin="Rn">
        <intro>
          <para>Is the 64-bit name of the general-purpose source register, encoded in the &quot;Rn&quot; field.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
  <timestamp>2026-03-26 20:27:25</timestamp>
  <commit_id>2026-03_rel</commit_id>
</instructionsection>