<?xml version="1.0" ?><?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?><!DOCTYPE instructionsection  PUBLIC '-//ARM//DTD instructionsection //EN'  'iform-p.dtd'><!-- Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. --><!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. --><instructionsection id="STG" title="STG -- A64" type="instruction">
  <docvars>
    <docvar key="instr-class" value="general"/>
    <docvar key="isa" value="A64"/>
    <docvar key="mnemonic" value="STG"/>
  </docvars>
  <heading>STG</heading>
  <desc>
    <brief>
      <para>Store Allocation Tag</para>
    </brief>
    <authored>
      <para>This instruction stores an Allocation Tag to memory. The address used for
the store is calculated from the base register and an immediate signed
offset scaled by the Tag Granule. The Allocation Tag is calculated from the
Logical Address Tag in the source register.</para>
      <para>This instruction generates an Unchecked access.</para>
    </authored>
  </desc>
  <alias_list howmany="0"/>
  <classes>
    <classesintro count="3">
      <txt>It has encodings from 3 classes:</txt>
      <a href="#iclass_post_index">Post-index</a>
      <txt>, </txt>
      <a href="#iclass_pre_index">Pre-index</a>
      <txt> and </txt>
      <a href="#iclass_signed_offset">Signed offset</a>
    </classesintro>
    <iclass name="Post-index" oneof="3" id="iclass_post_index" no_encodings="1" isa="A64">
      <docvars>
        <docvar key="address-form" value="post-indexed"/>
        <docvar key="instr-class" value="general"/>
        <docvar key="isa" value="A64"/>
        <docvar key="mnemonic" value="STG"/>
      </docvars>
      <iclassintro count="1"/>
      <arch_variants>
        <arch_variant feature="FEAT_MTE" name="v8Ap5"/>
      </arch_variants>
      <regdiagram form="32" psname="A64.ldst.ldsttags.STG_64Spost_ldsttags" tworows="1">
        <box hibit="31" width="4" settings="4">
          <c>1</c>
          <c>1</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="27" width="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="26" width="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="25" width="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="24" width="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="23" width="2" name="opc" usename="1" settings="2" psbits="xx">
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="21" width="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="20" width="9" name="imm9" usename="1">
          <c colspan="9"/>
        </box>
        <box hibit="11" width="2" name="op2" usename="1" settings="2" psbits="xx">
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="9" width="5" name="Rn" usename="1">
          <c colspan="5"/>
        </box>
        <box hibit="4" width="5" name="Rt" usename="1">
          <c colspan="5"/>
        </box>
      </regdiagram>
      <encoding name="STG_64Spost_ldsttags" oneofinclass="1" oneof="3" label="">
        <docvars>
          <docvar key="address-form" value="post-indexed"/>
          <docvar key="instr-class" value="general"/>
          <docvar key="isa" value="A64"/>
          <docvar key="mnemonic" value="STG"/>
        </docvars>
        <asmtemplate><text>STG  </text><a hover="Is the 64-bit name of the general-purpose source register or stack pointer, encoded in the &quot;Rt&quot; field." link="XtSP_option">&lt;Xt|SP&gt;</a><text>, [</text><a hover="Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the &quot;Rn&quot; field." link="XnSP_option">&lt;Xn|SP&gt;</a><text>], #</text><a hover="Is the optional signed immediate offset, a multiple of 16 in the range -4096 to 4080, defaulting to 0 and encoded in the &quot;imm9&quot; field." link="simm__2">&lt;simm&gt;</a></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="A64.ldst.ldsttags.STG_64Spost_ldsttags" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">if !IsFeatureImplemented(FEAT_MTE) then <a link="func_EndOfDecode_1" file="shared_pseudocode.xml">EndOfDecode</a>(<a link="enum_Decode_UNDEF" file="shared_pseudocode.xml">Decode_UNDEF</a>); end;
let t : integer{} = UInt(Rt);
let n : integer{} = UInt(Rn);
let offset : bits(64) = LSL(SignExtend{64}(imm9), <a link="global_LOG2_TAG_GRANULE" file="shared_pseudocode.xml">LOG2_TAG_GRANULE</a>);
let writeback : boolean = TRUE;
let postindex : boolean = TRUE;</pstext></ps>
      </ps_section>
    </iclass>
    <iclass name="Pre-index" oneof="3" id="iclass_pre_index" no_encodings="1" isa="A64">
      <docvars>
        <docvar key="address-form" value="pre-indexed"/>
        <docvar key="instr-class" value="general"/>
        <docvar key="isa" value="A64"/>
        <docvar key="mnemonic" value="STG"/>
      </docvars>
      <iclassintro count="1"/>
      <arch_variants>
        <arch_variant feature="FEAT_MTE" name="v8Ap5"/>
      </arch_variants>
      <regdiagram form="32" psname="A64.ldst.ldsttags.STG_64Spre_ldsttags" tworows="1">
        <box hibit="31" width="4" settings="4">
          <c>1</c>
          <c>1</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="27" width="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="26" width="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="25" width="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="24" width="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="23" width="2" name="opc" usename="1" settings="2" psbits="xx">
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="21" width="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="20" width="9" name="imm9" usename="1">
          <c colspan="9"/>
        </box>
        <box hibit="11" width="2" name="op2" usename="1" settings="2" psbits="xx">
          <c>1</c>
          <c>1</c>
        </box>
        <box hibit="9" width="5" name="Rn" usename="1">
          <c colspan="5"/>
        </box>
        <box hibit="4" width="5" name="Rt" usename="1">
          <c colspan="5"/>
        </box>
      </regdiagram>
      <encoding name="STG_64Spre_ldsttags" oneofinclass="1" oneof="3" label="">
        <docvars>
          <docvar key="address-form" value="pre-indexed"/>
          <docvar key="instr-class" value="general"/>
          <docvar key="isa" value="A64"/>
          <docvar key="mnemonic" value="STG"/>
        </docvars>
        <asmtemplate><text>STG  </text><a hover="Is the 64-bit name of the general-purpose source register or stack pointer, encoded in the &quot;Rt&quot; field." link="XtSP_option">&lt;Xt|SP&gt;</a><text>, [</text><a hover="Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the &quot;Rn&quot; field." link="XnSP_option">&lt;Xn|SP&gt;</a><text>, #</text><a hover="Is the optional signed immediate offset, a multiple of 16 in the range -4096 to 4080, defaulting to 0 and encoded in the &quot;imm9&quot; field." link="simm__2">&lt;simm&gt;</a><text>]!</text></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="A64.ldst.ldsttags.STG_64Spre_ldsttags" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">if !IsFeatureImplemented(FEAT_MTE) then <a link="func_EndOfDecode_1" file="shared_pseudocode.xml">EndOfDecode</a>(<a link="enum_Decode_UNDEF" file="shared_pseudocode.xml">Decode_UNDEF</a>); end;
let t : integer{} = UInt(Rt);
let n : integer{} = UInt(Rn);
let offset : bits(64) = LSL(SignExtend{64}(imm9), <a link="global_LOG2_TAG_GRANULE" file="shared_pseudocode.xml">LOG2_TAG_GRANULE</a>);
let writeback : boolean = TRUE;
let postindex : boolean = FALSE;</pstext></ps>
      </ps_section>
    </iclass>
    <iclass name="Signed offset" oneof="3" id="iclass_signed_offset" no_encodings="1" isa="A64">
      <docvars>
        <docvar key="address-form" value="signed-scaled-offset"/>
        <docvar key="instr-class" value="general"/>
        <docvar key="isa" value="A64"/>
        <docvar key="mnemonic" value="STG"/>
      </docvars>
      <iclassintro count="1"/>
      <arch_variants>
        <arch_variant feature="FEAT_MTE" name="v8Ap5"/>
      </arch_variants>
      <regdiagram form="32" psname="A64.ldst.ldsttags.STG_64Soffset_ldsttags" tworows="1">
        <box hibit="31" width="4" settings="4">
          <c>1</c>
          <c>1</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="27" width="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="26" width="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="25" width="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="24" width="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="23" width="2" name="opc" usename="1" settings="2" psbits="xx">
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="21" width="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="20" width="9" name="imm9" usename="1">
          <c colspan="9"/>
        </box>
        <box hibit="11" width="2" name="op2" usename="1" settings="2" psbits="xx">
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="9" width="5" name="Rn" usename="1">
          <c colspan="5"/>
        </box>
        <box hibit="4" width="5" name="Rt" usename="1">
          <c colspan="5"/>
        </box>
      </regdiagram>
      <encoding name="STG_64Soffset_ldsttags" oneofinclass="1" oneof="3" label="">
        <docvars>
          <docvar key="address-form" value="signed-scaled-offset"/>
          <docvar key="instr-class" value="general"/>
          <docvar key="isa" value="A64"/>
          <docvar key="mnemonic" value="STG"/>
        </docvars>
        <asmtemplate><text>STG  </text><a hover="Is the 64-bit name of the general-purpose source register or stack pointer, encoded in the &quot;Rt&quot; field." link="XtSP_option">&lt;Xt|SP&gt;</a><text>, [</text><a hover="Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the &quot;Rn&quot; field." link="XnSP_option">&lt;Xn|SP&gt;</a><text>{, #</text><a hover="Is the optional signed immediate offset, a multiple of 16 in the range -4096 to 4080, defaulting to 0 and encoded in the &quot;imm9&quot; field." link="simm__2">&lt;simm&gt;</a><text>}]</text></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="A64.ldst.ldsttags.STG_64Soffset_ldsttags" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">if !IsFeatureImplemented(FEAT_MTE) then <a link="func_EndOfDecode_1" file="shared_pseudocode.xml">EndOfDecode</a>(<a link="enum_Decode_UNDEF" file="shared_pseudocode.xml">Decode_UNDEF</a>); end;
let t : integer{} = UInt(Rt);
let n : integer{} = UInt(Rn);
let offset : bits(64) = LSL(SignExtend{64}(imm9), <a link="global_LOG2_TAG_GRANULE" file="shared_pseudocode.xml">LOG2_TAG_GRANULE</a>);
let writeback : boolean = FALSE;
let postindex : boolean = FALSE;</pstext></ps>
      </ps_section>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="STG_64Spost_ldsttags, STG_64Spre_ldsttags, STG_64Soffset_ldsttags" symboldefcount="1">
      <symbol link="XtSP_option">&lt;Xt|SP&gt;</symbol>
      <account encodedin="Rt">
        <intro>
          <para>Is the 64-bit name of the general-purpose source register or stack pointer, encoded in the &quot;Rt&quot; field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="STG_64Spost_ldsttags, STG_64Spre_ldsttags, STG_64Soffset_ldsttags" symboldefcount="1">
      <symbol link="XnSP_option">&lt;Xn|SP&gt;</symbol>
      <account encodedin="Rn">
        <intro>
          <para>Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the &quot;Rn&quot; field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="STG_64Spost_ldsttags, STG_64Spre_ldsttags, STG_64Soffset_ldsttags" symboldefcount="1">
      <symbol link="simm__2">&lt;simm&gt;</symbol>
      <account encodedin="imm9">
        <intro>
          <para>Is the optional signed immediate offset, a multiple of 16 in the range -4096 to 4080, defaulting to 0 and encoded in the &quot;imm9&quot; field.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
  <ps_section howmany="1">
    <ps name="A64.ldst.ldsttags.STG_64Spost_ldsttags" sections="1" secttype="Operation">
      <pstext mayhavelinks="1" section="Execute" rep_section="execute">var address : bits(64);

if n == 31 then
    <a link="func_CheckSPAlignment_0" file="shared_pseudocode.xml">CheckSPAlignment</a>();
    address = <a link="accessor_SP_1" file="shared_pseudocode.xml">SP</a>{64}();
else
    address = <a link="accessor_X_2" file="shared_pseudocode.xml">X</a>{64}(n);
end;

let stzgm : boolean = FALSE;
let accdesc : <a link="type_AccessDescriptor" file="shared_pseudocode.xml">AccessDescriptor</a> = <a link="func_CreateAccDescLDGSTG_3" file="shared_pseudocode.xml">CreateAccDescLDGSTG</a>(<a link="enum_MemOp_STORE" file="shared_pseudocode.xml">MemOp_STORE</a>, stzgm, t);

if !postindex then
    address = <a link="func_AddressAdd_3" file="shared_pseudocode.xml">AddressAdd</a>(address, offset, accdesc);
end;

let data : bits(64) = if t == 31 then <a link="accessor_SP_1" file="shared_pseudocode.xml">SP</a>{64}() else <a link="accessor_X_2" file="shared_pseudocode.xml">X</a>{64}(t);
let tag : bits(4) = <a link="func_AArch64_AllocationTagFromAddress_1" file="shared_pseudocode.xml">AArch64_AllocationTagFromAddress</a>(data);
<a link="accessor_AArch64_MemTag_2" file="shared_pseudocode.xml">AArch64_MemTag</a>(address, accdesc) = tag;

if writeback then
    if postindex then
        address = <a link="func_AddressAdd_3" file="shared_pseudocode.xml">AddressAdd</a>(address, offset, accdesc);
    end;

    if n == 31 then
        <a link="accessor_SP_1" file="shared_pseudocode.xml">SP</a>{64}() = address;
    else
        <a link="accessor_X_2" file="shared_pseudocode.xml">X</a>{64}(n) = address;
    end;
end;</pstext></ps>
  </ps_section>
  <timestamp>2026-03-26 20:27:25</timestamp>
  <commit_id>2026-03_rel</commit_id>
</instructionsection>