STTRB
Store register byte (unprivileged)
This instruction stores a byte from a 32-bit register to memory.
The address that is used for the store is calculated
from a base register and an immediate offset.
Explicit Memory effects produced by the instruction behave as if the instruction was
executed at EL0 if the Effective value of
PSTATE.UAO is 0 and either:
The instruction is executed at EL1.
The instruction is executed at EL2 when the Effective value
of HCR_EL2().{E2H, TGE} is '11'.
Otherwise, the Explicit Memory effects operate with the restrictions determined by
the Exception level at which the instruction is executed.
For information about addressing modes, see Load/Store addressing modes.
This instruction is a data-independent-time instruction as described in About PSTATE.DIT.
0
0
1
1
1
0
0
0
0
0
0
1
0
STTRB <Wt>, [<Xn|SP>{, #<simm>}]
let offset : bits(64) = SignExtend{}(imm9);
<Wt>
Is the 32-bit name of the general-purpose register to be transferred, encoded in the "Rt" field.
<Xn|SP>
Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field.
<simm>
Is the optional signed immediate byte offset, in the range -256 to 255, defaulting to 0 and encoded in the "imm9" field.
let t : integer{} = UInt(Rt);
let n : integer{} = UInt(Rn);
let datasize : integer{} = 8;
let nontemporal : boolean = FALSE;
let tagchecked : boolean = n != 31;
var address : bits(64);
let privileged : boolean = AArch64_IsUnprivAccessPriv();
let accdesc : AccessDescriptor = CreateAccDescGPR(MemOp_STORE, nontemporal, privileged,
tagchecked, t);
if n == 31 then
CheckSPAlignment();
address = SP{64}();
else
address = X{64}(n);
end;
address = AddressAdd(address, offset, accdesc);
Mem{datasize}(address, accdesc) = X{datasize}(t);
2026-03-26 20:27:25
2026-03_rel