STTSET, STTSETL Atomic bit set unprivileged, without return This instruction atomically loads a 32-bit word or 64-bit doubleword from memory, performs a bitwise OR with the value held in a register on it, and stores the result back to memory. STTSET does not have release semantics. STTSETL stores to memory with release semantics, as described in Load-Acquire, Store-Release. For information about addressing modes, see Load/Store addressing modes. LDTSET, LDTSETA, LDTSETAL, LDTSETL 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 1 1 1 1 0 0 STTSET <Ws>, [<Xn|SP>] LDTSET <Ws>, WZR, [<Xn|SP>] Unconditionally 0 1 STTSETL <Ws>, [<Xn|SP>] LDTSETL <Ws>, WZR, [<Xn|SP>] Unconditionally 1 0 STTSET <Xs>, [<Xn|SP>] LDTSET <Xs>, XZR, [<Xn|SP>] Unconditionally 1 1 STTSETL <Xs>, [<Xn|SP>] LDTSETL <Xs>, XZR, [<Xn|SP>] Unconditionally <Ws> Is the 32-bit name of the general-purpose register holding the data value to be operated on with the contents of the memory location, encoded in the "Rs" field. <Xn|SP> Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field. <Xs> Is the 64-bit name of the general-purpose register holding the data value to be operated on with the contents of the memory location, encoded in the "Rs" field. 2026-03-26 20:27:25 2026-03_rel