SWP, SWPA, SWPAL, SWPL
Swap word or doubleword in memory
This instruction
atomically loads a 32-bit word or 64-bit doubleword from a memory location,
and stores the value held in a register back to the same memory location.
The value initially loaded from memory is returned in the destination register.
If the destination register is not one of WZR or
XZR, SWPA and SWPAL load from memory with acquire semantics.
SWPL and SWPAL store to memory with release semantics.
SWP has neither acquire nor release semantics.
For more information about memory ordering semantics, see Load-Acquire, Store-Release.
For information about addressing modes, see
Load/Store addressing modes.
1
x
1
1
1
0
0
0
1
1
0
0
0
0
0
0
0
0
SWP <Ws>, <Wt>, [<Xn|SP>]
0
1
0
SWPA <Ws>, <Wt>, [<Xn|SP>]
0
1
1
SWPAL <Ws>, <Wt>, [<Xn|SP>]
0
0
1
SWPL <Ws>, <Wt>, [<Xn|SP>]
1
0
0
SWP <Xs>, <Xt>, [<Xn|SP>]
1
1
0
SWPA <Xs>, <Xt>, [<Xn|SP>]
1
1
1
SWPAL <Xs>, <Xt>, [<Xn|SP>]
1
0
1
SWPL <Xs>, <Xt>, [<Xn|SP>]
if !IsFeatureImplemented(FEAT_LSE) then EndOfDecode(Decode_UNDEF); end;
let s : integer{} = UInt(Rs);
let t : integer{} = UInt(Rt);
let n : integer{} = UInt(Rn);
let datasize : integer{} = 8 << UInt(size);
let regsize : integer{} = if datasize == 64 then 64 else 32;
let acquire : boolean = A == '1' && Rt != '11111';
let release : boolean = R == '1';
let tagchecked : boolean = n != 31;
<Ws>
Is the 32-bit name of the general-purpose register to be stored, encoded in the "Rs" field.
<Wt>
Is the 32-bit name of the general-purpose register to be loaded, encoded in the "Rt" field.
<Xn|SP>
Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field.
<Xs>
Is the 64-bit name of the general-purpose register to be stored, encoded in the "Rs" field.
<Xt>
Is the 64-bit name of the general-purpose register to be loaded, encoded in the "Rt" field.
var address : bits(64);
var data : bits(datasize);
var store_value : bits(datasize);
let privileged : boolean = PSTATE.EL != EL0;
let accdesc : AccessDescriptor = CreateAccDescAtomicOp(MemAtomicOp_SWP, acquire, release,
tagchecked, privileged, t, s);
if n == 31 then
CheckSPAlignment();
address = SP{64}();
else
address = X{64}(n);
end;
store_value = X{datasize}(s);
let comparevalue : bits(datasize) = ARBITRARY : bits(datasize); // Irrelevant when not executing CAS
data = MemAtomic{datasize}(address, comparevalue, store_value, accdesc);
X{regsize}(t) = ZeroExtend{regsize}(data);
2026-03-26 20:27:25
2026-03_rel