SYSL System instruction with result For more information, see op0 == 0b01, cache maintenance, TLB maintenance, address translation, prediction restriction, BRBE, Trace Extension, and Guarded Control Stack instructions for the encodings of System instructions. This instruction is used by the aliases GCSPOPM op1 == '011' && CRn == '0111' && CRm == '0111' && op2 == '001' GCSSS2 op1 == '011' && CRn == '0111' && CRm == '0111' && op2 == '011' See below for details of when each alias is preferred. 1 1 0 1 0 1 0 1 0 0 1 0 1 SYSL <Xt>, #<op1>, <Cn>, <Cm>, #<op2> let t : integer = UInt(Rt); let sys_L : bits(1) = L; let sys_op0 : bits(2) = '01'; let sys_op1 : bits(3) = op1; let sys_op2 : bits(3) = op2; let sys_crn : bits(4) = CRn; let sys_crm : bits(4) = CRm; <Xt> Is the 64-bit name of the general-purpose destination register, encoded in the "Rt" field. <op1> Is a 3-bit unsigned immediate, in the range 0 to 7, encoded in the "op1" field. <Cn> Is a name 'Cn', with 'n' in the range 0 to 15, encoded in the "CRn" field. <Cm> Is a name 'Cm', with 'm' in the range 0 to 15, encoded in the "CRm" field. <op2> Is a 3-bit unsigned immediate, in the range 0 to 7, encoded in the "op2" field. Alias Conditions AArch64_SysInstrWithResult(sys_op0, sys_op1, sys_crn, sys_crm, sys_op2, t); 2026-03-26 20:27:25 2026-03_rel