<?xml version="1.0" ?><?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?><!DOCTYPE instructionsection  PUBLIC '-//ARM//DTD instructionsection //EN'  'iform-p.dtd'><!-- Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. --><!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. --><instructionsection id="TLBI_SYS" title="TLBI -- A64" type="alias">
  <docvars>
    <docvar key="alias_mnemonic" value="TLBI"/>
    <docvar key="instr-class" value="system"/>
    <docvar key="isa" value="A64"/>
    <docvar key="mnemonic" value="SYS"/>
  </docvars>
  <heading>TLBI</heading>
  <desc>
    <brief>
      <para>TLB invalidate operation</para>
    </brief>
    <authored>
      <para>For more information, see
<xref linkend="ARMARM_BABEJJJE">op0 == 0b01, cache maintenance, TLB maintenance, address translation, prediction restriction,
BRBE, Trace Extension, and Guarded Control Stack instructions</xref>.</para>
    </authored>
  </desc>
  <aliasto refiform="sys.xml" iformid="SYS">SYS</aliasto>
  <classes>
    <iclass name="System" oneof="1" id="iclass_system" no_encodings="1" isa="A64">
      <docvars>
        <docvar key="instr-class" value="system"/>
        <docvar key="isa" value="A64"/>
        <docvar key="mnemonic" value="SYS"/>
      </docvars>
      <iclassintro count="1"/>
      <regdiagram form="32" psname="A64.control.systeminstrs.SYS_CR_systeminstrs.TLBI" tworows="1">
        <box hibit="31" width="3" settings="3">
          <c>1</c>
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="28" width="3" settings="3">
          <c>1</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="25" width="4" settings="4">
          <c>0</c>
          <c>1</c>
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="21" name="L" usename="1" settings="1" psbits="x">
          <c>0</c>
        </box>
        <box hibit="20" width="2" settings="2">
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="18" width="3" name="op1" usename="1">
          <c colspan="3"/>
        </box>
        <box hibit="15" width="4" name="CRn" usename="1" settings="3" psbits="xxxx">
          <c>1</c>
          <c>0</c>
          <c>0</c>
          <c>x</c>
        </box>
        <box hibit="11" width="4" name="CRm" usename="1">
          <c colspan="4"/>
        </box>
        <box hibit="7" width="3" name="op2" usename="1">
          <c colspan="3"/>
        </box>
        <box hibit="4" width="5" name="Rt" usename="1">
          <c colspan="5"/>
        </box>
      </regdiagram>
      <encoding name="TLBI_SYS_CR_systeminstrs" oneofinclass="1" oneof="1" label="">
        <docvars>
          <docvar key="instr-class" value="system"/>
          <docvar key="isa" value="A64"/>
          <docvar key="mnemonic" value="SYS"/>
          <docvar key="alias_mnemonic" value="TLBI"/>
        </docvars>
        <asmtemplate><text>TLBI  </text><a hover="Is a TLBI operation name, as listed for the TLBI system instruction group, " link="tlbi_op_option">&lt;tlbi_op&gt;</a><text>{, </text><a hover="Is the 64-bit name of the optional general-purpose source register, defaulting to '11111', encoded in the &quot;Rt&quot; field." link="XtOrXZR__2">&lt;Xt&gt;</a><text>}</text></asmtemplate>
        <equivalent_to>
          <asmtemplate><a href="sys.xml#SYS_CR_systeminstrs">SYS</a><text>  #</text><a hover="Is a 3-bit unsigned immediate, in the range 0 to 7, encoded in the &quot;op1&quot; field." href="sys.xml#op1">&lt;op1&gt;</a><text>, </text><a hover="Is a name 'Cn', with 'n' in the range 0 to 15, encoded in the &quot;CRn&quot; field." href="sys.xml#Cn">&lt;Cn&gt;</a><text>, </text><a hover="Is a name 'Cm', with 'm' in the range 0 to 15, encoded in the &quot;CRm&quot; field." href="sys.xml#Cm">&lt;Cm&gt;</a><text>, #</text><a hover="Is a 3-bit unsigned immediate, in the range 0 to 7, encoded in the &quot;op2&quot; field." href="sys.xml#op2">&lt;op2&gt;</a><text>{, </text><a hover="Is the 64-bit name of the optional general-purpose source register, defaulting to '11111', encoded in the &quot;Rt&quot; field." href="sys.xml#XtOrXZR__2">&lt;Xt&gt;</a><text>}</text></asmtemplate>
          <aliascond>SysOp(op1, CRn, CRm, op2) == Sys_TLBI</aliascond>
        </equivalent_to>
      </encoding>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="TLBI_SYS_CR_systeminstrs" symboldefcount="1">
      <symbol link="tlbi_op_option">&lt;tlbi_op&gt;</symbol>
      <definition encodedin="(op1 :: CRn :: CRm :: op2)">
        <intro>Is a TLBI operation name, as listed for the TLBI system instruction group, </intro>
        <table class="valuetable">
          <tgroup cols="7">
            <thead>
              <row>
                <entry class="bitfield">op1</entry>
                <entry class="bitfield">CRn</entry>
                <entry class="bitfield">CRm</entry>
                <entry class="bitfield">op2</entry>
                <entry class="symbol">&lt;tlbi_op&gt;</entry>
                <entry class="symbol">Architectural Feature</entry>
                <entry class="symbol">Description</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">VMALLE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIOS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vmalle1os.xml" state="AArch64">TLBI VMALLE1OS, TLBI VMALLE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIOS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vae1os.xml" state="AArch64">TLBI VAE1OS, TLBI VAE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">010</entry>
                <entry class="symbol">ASIDE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIOS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-aside1os.xml" state="AArch64">TLBI ASIDE1OS, TLBI ASIDE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">VAAE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIOS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vaae1os.xml" state="AArch64">TLBI VAAE1OS, TLBI VAAE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIOS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vale1os.xml" state="AArch64">TLBI VALE1OS, TLBI VALE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">VAALE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIOS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vaale1os.xml" state="AArch64">TLBI VAALE1OS, TLBI VAALE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE1IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvae1is.xml" state="AArch64">TLBI RVAE1IS, TLBI RVAE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">RVAAE1IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvaae1is.xml" state="AArch64">TLBI RVAAE1IS, TLBI RVAAE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE1IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvale1is.xml" state="AArch64">TLBI RVALE1IS, TLBI RVALE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">RVAALE1IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvaale1is.xml" state="AArch64">TLBI RVAALE1IS, TLBI RVAALE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">VMALLE1IS</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vmalle1is.xml" state="AArch64">TLBI VMALLE1IS, TLBI VMALLE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE1IS</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vae1is.xml" state="AArch64">TLBI VAE1IS, TLBI VAE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">010</entry>
                <entry class="symbol">ASIDE1IS</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-aside1is.xml" state="AArch64">TLBI ASIDE1IS, TLBI ASIDE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">VAAE1IS</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vaae1is.xml" state="AArch64">TLBI VAAE1IS, TLBI VAAE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE1IS</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vale1is.xml" state="AArch64">TLBI VALE1IS, TLBI VALE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">VAALE1IS</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vaale1is.xml" state="AArch64">TLBI VAALE1IS, TLBI VAALE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvae1os.xml" state="AArch64">TLBI RVAE1OS, TLBI RVAE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">RVAAE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvaae1os.xml" state="AArch64">TLBI RVAAE1OS, TLBI RVAAE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvale1os.xml" state="AArch64">TLBI RVALE1OS, TLBI RVALE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">RVAALE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvaale1os.xml" state="AArch64">TLBI RVAALE1OS, TLBI RVAALE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE1</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvae1.xml" state="AArch64">TLBI RVAE1, TLBI RVAE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">RVAAE1</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvaae1.xml" state="AArch64">TLBI RVAAE1, TLBI RVAAE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE1</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvale1.xml" state="AArch64">TLBI RVALE1, TLBI RVALE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">RVAALE1</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvaale1.xml" state="AArch64">TLBI RVAALE1, TLBI RVAALE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">VMALLE1</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vmalle1.xml" state="AArch64">TLBI VMALLE1, TLBI VMALLE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE1</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vae1.xml" state="AArch64">TLBI VAE1, TLBI VAE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">010</entry>
                <entry class="symbol">ASIDE1</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-aside1.xml" state="AArch64">TLBI ASIDE1, TLBI ASIDE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">VAAE1</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vaae1.xml" state="AArch64">TLBI VAAE1, TLBI VAAE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE1</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vale1.xml" state="AArch64">TLBI VALE1, TLBI VALE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">VAALE1</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vaale1.xml" state="AArch64">TLBI VAALE1, TLBI VAALE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">VMALLE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vmalle1os.xml" state="AArch64">TLBI VMALLE1OS, TLBI VMALLE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vae1os.xml" state="AArch64">TLBI VAE1OS, TLBI VAE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">010</entry>
                <entry class="symbol">ASIDE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-aside1os.xml" state="AArch64">TLBI ASIDE1OS, TLBI ASIDE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">VAAE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vaae1os.xml" state="AArch64">TLBI VAAE1OS, TLBI VAAE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vale1os.xml" state="AArch64">TLBI VALE1OS, TLBI VALE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">VAALE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vaale1os.xml" state="AArch64">TLBI VAALE1OS, TLBI VAALE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvae1is.xml" state="AArch64">TLBI RVAE1IS, TLBI RVAE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">RVAAE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvaae1is.xml" state="AArch64">TLBI RVAAE1IS, TLBI RVAAE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvale1is.xml" state="AArch64">TLBI RVALE1IS, TLBI RVALE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">RVAALE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvaale1is.xml" state="AArch64">TLBI RVAALE1IS, TLBI RVAALE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">VMALLE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vmalle1is.xml" state="AArch64">TLBI VMALLE1IS, TLBI VMALLE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vae1is.xml" state="AArch64">TLBI VAE1IS, TLBI VAE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">010</entry>
                <entry class="symbol">ASIDE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-aside1is.xml" state="AArch64">TLBI ASIDE1IS, TLBI ASIDE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">VAAE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vaae1is.xml" state="AArch64">TLBI VAAE1IS, TLBI VAAE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vale1is.xml" state="AArch64">TLBI VALE1IS, TLBI VALE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">VAALE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vaale1is.xml" state="AArch64">TLBI VAALE1IS, TLBI VAALE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvae1os.xml" state="AArch64">TLBI RVAE1OS, TLBI RVAE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">RVAAE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvaae1os.xml" state="AArch64">TLBI RVAAE1OS, TLBI RVAAE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvale1os.xml" state="AArch64">TLBI RVALE1OS, TLBI RVALE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">RVAALE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvaale1os.xml" state="AArch64">TLBI RVAALE1OS, TLBI RVAALE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvae1.xml" state="AArch64">TLBI RVAE1, TLBI RVAE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">RVAAE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvaae1.xml" state="AArch64">TLBI RVAAE1, TLBI RVAAE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvale1.xml" state="AArch64">TLBI RVALE1, TLBI RVALE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">RVAALE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvaale1.xml" state="AArch64">TLBI RVAALE1, TLBI RVAALE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">VMALLE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vmalle1.xml" state="AArch64">TLBI VMALLE1, TLBI VMALLE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vae1.xml" state="AArch64">TLBI VAE1, TLBI VAE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">010</entry>
                <entry class="symbol">ASIDE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-aside1.xml" state="AArch64">TLBI ASIDE1, TLBI ASIDE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">VAAE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vaae1.xml" state="AArch64">TLBI VAAE1, TLBI VAAE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vale1.xml" state="AArch64">TLBI VALE1, TLBI VALE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">VAALE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vaale1.xml" state="AArch64">TLBI VAALE1, TLBI VAALE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0000</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">IPAS2E1IS</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ipas2e1is.xml" state="AArch64">TLBI IPAS2E1IS, TLBI IPAS2E1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0000</entry>
                <entry class="bitfield">010</entry>
                <entry class="symbol">RIPAS2E1IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ripas2e1is.xml" state="AArch64">TLBI RIPAS2E1IS, TLBI RIPAS2E1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0000</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">IPAS2LE1IS</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ipas2le1is.xml" state="AArch64">TLBI IPAS2LE1IS, TLBI IPAS2LE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0000</entry>
                <entry class="bitfield">110</entry>
                <entry class="symbol">RIPAS2LE1IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ripas2le1is.xml" state="AArch64">TLBI RIPAS2LE1IS, TLBI RIPAS2LE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">ALLE2OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIOS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-alle2os.xml" state="AArch64">TLBI ALLE2OS, TLBI ALLE2OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE2OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIOS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vae2os.xml" state="AArch64">TLBI VAE2OS, TLBI VAE2OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">100</entry>
                <entry class="symbol">ALLE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIOS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-alle1os.xml" state="AArch64">TLBI ALLE1OS, TLBI ALLE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE2OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIOS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vale2os.xml" state="AArch64">TLBI VALE2OS, TLBI VALE2OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">110</entry>
                <entry class="symbol">VMALLS12E1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIOS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vmalls12e1os.xml" state="AArch64">TLBI VMALLS12E1OS, TLBI VMALLS12E1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE2IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvae2is.xml" state="AArch64">TLBI RVAE2IS, TLBI RVAE2ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">010</entry>
                <entry class="symbol">VMALLWS2E1IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIW"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vmallws2e1is.xml" state="AArch64">TLBI VMALLWS2E1IS, TLBI VMALLWS2E1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE2IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvale2is.xml" state="AArch64">TLBI RVALE2IS, TLBI RVALE2ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">ALLE2IS</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-alle2is.xml" state="AArch64">TLBI ALLE2IS, TLBI ALLE2ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE2IS</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vae2is.xml" state="AArch64">TLBI VAE2IS, TLBI VAE2ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">100</entry>
                <entry class="symbol">ALLE1IS</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-alle1is.xml" state="AArch64">TLBI ALLE1IS, TLBI ALLE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE2IS</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vale2is.xml" state="AArch64">TLBI VALE2IS, TLBI VALE2ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">110</entry>
                <entry class="symbol">VMALLS12E1IS</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vmalls12e1is.xml" state="AArch64">TLBI VMALLS12E1IS, TLBI VMALLS12E1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">IPAS2E1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIOS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ipas2e1os.xml" state="AArch64">TLBI IPAS2E1OS, TLBI IPAS2E1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">IPAS2E1</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ipas2e1.xml" state="AArch64">TLBI IPAS2E1, TLBI IPAS2E1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">010</entry>
                <entry class="symbol">RIPAS2E1</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ripas2e1.xml" state="AArch64">TLBI RIPAS2E1, TLBI RIPAS2E1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">RIPAS2E1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ripas2e1os.xml" state="AArch64">TLBI RIPAS2E1OS, TLBI RIPAS2E1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">100</entry>
                <entry class="symbol">IPAS2LE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIOS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ipas2le1os.xml" state="AArch64">TLBI IPAS2LE1OS, TLBI IPAS2LE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">IPAS2LE1</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ipas2le1.xml" state="AArch64">TLBI IPAS2LE1, TLBI IPAS2LE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">110</entry>
                <entry class="symbol">RIPAS2LE1</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ripas2le1.xml" state="AArch64">TLBI RIPAS2LE1, TLBI RIPAS2LE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">RIPAS2LE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ripas2le1os.xml" state="AArch64">TLBI RIPAS2LE1OS, TLBI RIPAS2LE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE2OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvae2os.xml" state="AArch64">TLBI RVAE2OS, TLBI RVAE2OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">010</entry>
                <entry class="symbol">VMALLWS2E1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIW"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vmallws2e1os.xml" state="AArch64">TLBI VMALLWS2E1OS, TLBI VMALLWS2E1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE2OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvale2os.xml" state="AArch64">TLBI RVALE2OS, TLBI RVALE2OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE2</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvae2.xml" state="AArch64">TLBI RVAE2, TLBI RVAE2NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">010</entry>
                <entry class="symbol">VMALLWS2E1</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIW"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vmallws2e1.xml" state="AArch64">TLBI VMALLWS2E1, TLBI VMALLWS2E1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE2</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvale2.xml" state="AArch64">TLBI RVALE2, TLBI RVALE2NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">ALLE2</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-alle2.xml" state="AArch64">TLBI ALLE2, TLBI ALLE2NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE2</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vae2.xml" state="AArch64">TLBI VAE2, TLBI VAE2NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">100</entry>
                <entry class="symbol">ALLE1</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-alle1.xml" state="AArch64">TLBI ALLE1, TLBI ALLE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE2</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vale2.xml" state="AArch64">TLBI VALE2, TLBI VALE2NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">110</entry>
                <entry class="symbol">VMALLS12E1</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vmalls12e1.xml" state="AArch64">TLBI VMALLS12E1, TLBI VMALLS12E1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0000</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">IPAS2E1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ipas2e1is.xml" state="AArch64">TLBI IPAS2E1IS, TLBI IPAS2E1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0000</entry>
                <entry class="bitfield">010</entry>
                <entry class="symbol">RIPAS2E1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ripas2e1is.xml" state="AArch64">TLBI RIPAS2E1IS, TLBI RIPAS2E1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0000</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">IPAS2LE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ipas2le1is.xml" state="AArch64">TLBI IPAS2LE1IS, TLBI IPAS2LE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0000</entry>
                <entry class="bitfield">110</entry>
                <entry class="symbol">RIPAS2LE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ripas2le1is.xml" state="AArch64">TLBI RIPAS2LE1IS, TLBI RIPAS2LE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">ALLE2OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-alle2os.xml" state="AArch64">TLBI ALLE2OS, TLBI ALLE2OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE2OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vae2os.xml" state="AArch64">TLBI VAE2OS, TLBI VAE2OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">100</entry>
                <entry class="symbol">ALLE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-alle1os.xml" state="AArch64">TLBI ALLE1OS, TLBI ALLE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE2OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vale2os.xml" state="AArch64">TLBI VALE2OS, TLBI VALE2OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">110</entry>
                <entry class="symbol">VMALLS12E1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vmalls12e1os.xml" state="AArch64">TLBI VMALLS12E1OS, TLBI VMALLS12E1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE2ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvae2is.xml" state="AArch64">TLBI RVAE2IS, TLBI RVAE2ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">010</entry>
                <entry class="symbol">VMALLWS2E1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIW"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vmallws2e1is.xml" state="AArch64">TLBI VMALLWS2E1IS, TLBI VMALLWS2E1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE2ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvale2is.xml" state="AArch64">TLBI RVALE2IS, TLBI RVALE2ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">ALLE2ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-alle2is.xml" state="AArch64">TLBI ALLE2IS, TLBI ALLE2ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE2ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vae2is.xml" state="AArch64">TLBI VAE2IS, TLBI VAE2ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">100</entry>
                <entry class="symbol">ALLE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-alle1is.xml" state="AArch64">TLBI ALLE1IS, TLBI ALLE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE2ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vale2is.xml" state="AArch64">TLBI VALE2IS, TLBI VALE2ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">110</entry>
                <entry class="symbol">VMALLS12E1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vmalls12e1is.xml" state="AArch64">TLBI VMALLS12E1IS, TLBI VMALLS12E1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">IPAS2E1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ipas2e1os.xml" state="AArch64">TLBI IPAS2E1OS, TLBI IPAS2E1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">IPAS2E1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ipas2e1.xml" state="AArch64">TLBI IPAS2E1, TLBI IPAS2E1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">010</entry>
                <entry class="symbol">RIPAS2E1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ripas2e1.xml" state="AArch64">TLBI RIPAS2E1, TLBI RIPAS2E1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">RIPAS2E1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ripas2e1os.xml" state="AArch64">TLBI RIPAS2E1OS, TLBI RIPAS2E1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">100</entry>
                <entry class="symbol">IPAS2LE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ipas2le1os.xml" state="AArch64">TLBI IPAS2LE1OS, TLBI IPAS2LE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">IPAS2LE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ipas2le1.xml" state="AArch64">TLBI IPAS2LE1, TLBI IPAS2LE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">110</entry>
                <entry class="symbol">RIPAS2LE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ripas2le1.xml" state="AArch64">TLBI RIPAS2LE1, TLBI RIPAS2LE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">RIPAS2LE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-ripas2le1os.xml" state="AArch64">TLBI RIPAS2LE1OS, TLBI RIPAS2LE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE2OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvae2os.xml" state="AArch64">TLBI RVAE2OS, TLBI RVAE2OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">010</entry>
                <entry class="symbol">VMALLWS2E1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIW"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vmallws2e1os.xml" state="AArch64">TLBI VMALLWS2E1OS, TLBI VMALLWS2E1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE2OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvale2os.xml" state="AArch64">TLBI RVALE2OS, TLBI RVALE2OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE2NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvae2.xml" state="AArch64">TLBI RVAE2, TLBI RVAE2NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">010</entry>
                <entry class="symbol">VMALLWS2E1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIW"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vmallws2e1.xml" state="AArch64">TLBI VMALLWS2E1, TLBI VMALLWS2E1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE2NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvale2.xml" state="AArch64">TLBI RVALE2, TLBI RVALE2NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">ALLE2NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-alle2.xml" state="AArch64">TLBI ALLE2, TLBI ALLE2NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE2NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vae2.xml" state="AArch64">TLBI VAE2, TLBI VAE2NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">100</entry>
                <entry class="symbol">ALLE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-alle1.xml" state="AArch64">TLBI ALLE1, TLBI ALLE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE2NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vale2.xml" state="AArch64">TLBI VALE2, TLBI VALE2NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">110</entry>
                <entry class="symbol">VMALLS12E1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vmalls12e1.xml" state="AArch64">TLBI VMALLS12E1, TLBI VMALLS12E1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">ALLE3OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIOS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-alle3os.xml" state="AArch64">TLBI ALLE3OS, TLBI ALLE3OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE3OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIOS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vae3os.xml" state="AArch64">TLBI VAE3OS, TLBI VAE3OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">100</entry>
                <entry class="symbol">PAALLOS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_RME"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-paallos.xml" state="AArch64">TLBI PAALLOS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE3OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIOS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vale3os.xml" state="AArch64">TLBI VALE3OS, TLBI VALE3OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE3IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvae3is.xml" state="AArch64">TLBI RVAE3IS, TLBI RVAE3ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE3IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvale3is.xml" state="AArch64">TLBI RVALE3IS, TLBI RVALE3ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">ALLE3IS</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-alle3is.xml" state="AArch64">TLBI ALLE3IS, TLBI ALLE3ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE3IS</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vae3is.xml" state="AArch64">TLBI VAE3IS, TLBI VAE3ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE3IS</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vale3is.xml" state="AArch64">TLBI VALE3IS, TLBI VALE3ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">RPAOS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_RME"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rpaos.xml" state="AArch64">TLBI RPAOS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">RPALOS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_RME"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rpalos.xml" state="AArch64">TLBI RPALOS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE3OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvae3os.xml" state="AArch64">TLBI RVAE3OS, TLBI RVAE3OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE3OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvale3os.xml" state="AArch64">TLBI RVALE3OS, TLBI RVALE3OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE3</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvae3.xml" state="AArch64">TLBI RVAE3, TLBI RVAE3NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE3</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_TLBIRANGE"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvale3.xml" state="AArch64">TLBI RVALE3, TLBI RVALE3NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">ALLE3</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-alle3.xml" state="AArch64">TLBI ALLE3, TLBI ALLE3NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE3</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vae3.xml" state="AArch64">TLBI VAE3, TLBI VAE3NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">100</entry>
                <entry class="symbol">PAALL</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_RME"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-paall.xml" state="AArch64">TLBI PAALL</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE3</entry>
                <entry class="feature"/>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vale3.xml" state="AArch64">TLBI VALE3, TLBI VALE3NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">ALLE3OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-alle3os.xml" state="AArch64">TLBI ALLE3OS, TLBI ALLE3OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE3OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vae3os.xml" state="AArch64">TLBI VAE3OS, TLBI VAE3OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE3OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vale3os.xml" state="AArch64">TLBI VALE3OS, TLBI VALE3OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE3ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvae3is.xml" state="AArch64">TLBI RVAE3IS, TLBI RVAE3ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE3ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvale3is.xml" state="AArch64">TLBI RVALE3IS, TLBI RVALE3ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">ALLE3ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-alle3is.xml" state="AArch64">TLBI ALLE3IS, TLBI ALLE3ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE3ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vae3is.xml" state="AArch64">TLBI VAE3IS, TLBI VAE3ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE3ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vale3is.xml" state="AArch64">TLBI VALE3IS, TLBI VALE3ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE3OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvae3os.xml" state="AArch64">TLBI RVAE3OS, TLBI RVAE3OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE3OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvale3os.xml" state="AArch64">TLBI RVALE3OS, TLBI RVALE3OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE3NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvae3.xml" state="AArch64">TLBI RVAE3, TLBI RVAE3NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE3NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-rvale3.xml" state="AArch64">TLBI RVALE3, TLBI RVALE3NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">ALLE3NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-alle3.xml" state="AArch64">TLBI ALLE3, TLBI ALLE3NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE3NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vae3.xml" state="AArch64">TLBI VAE3, TLBI VAE3NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE3NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_XS"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbi-vale3.xml" state="AArch64">TLBI VALE3, TLBI VALE3NXS</register_link>.</para>
                </entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </definition>
    </explanation>
    <explanation enclist="TLBI_SYS_CR_systeminstrs" symboldefcount="1">
      <symbol link="XtOrXZR__2">&lt;Xt&gt;</symbol>
      <account encodedin="Rt">
        <intro>
          <para>Is the 64-bit name of the optional general-purpose source register, defaulting to '11111', encoded in the &quot;Rt&quot; field.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
  <timestamp>2026-03-26 20:27:25</timestamp>
  <commit_id>2026-03_rel</commit_id>
</instructionsection>