<?xml version="1.0" ?><?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?><!DOCTYPE instructionsection  PUBLIC '-//ARM//DTD instructionsection //EN'  'iform-p.dtd'><!-- Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. --><!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. --><instructionsection id="TLBIP_SYSP" title="TLBIP -- A64" type="alias">
  <docvars>
    <docvar key="alias_mnemonic" value="TLBIP"/>
    <docvar key="instr-class" value="system"/>
    <docvar key="isa" value="A64"/>
    <docvar key="mnemonic" value="SYSP"/>
  </docvars>
  <heading>TLBIP</heading>
  <desc>
    <brief>
      <para>TLB invalidate pair operation</para>
    </brief>
    <authored>
      <para>TLB invalidate pair operation.</para>
    </authored>
  </desc>
  <aliasto refiform="sysp.xml" iformid="SYSP">SYSP</aliasto>
  <classes>
    <iclass name="System" oneof="1" id="iclass_system" no_encodings="1" isa="A64">
      <docvars>
        <docvar key="instr-class" value="system"/>
        <docvar key="isa" value="A64"/>
        <docvar key="mnemonic" value="SYSP"/>
      </docvars>
      <iclassintro count="1"/>
      <arch_variants>
        <arch_variant feature="FEAT_SYSINSTR128" name="v9Ap4"/>
      </arch_variants>
      <regdiagram form="32" psname="A64.control.syspairinstrs.SYSP_CR_syspairinstrs.TLBIP" tworows="1">
        <box hibit="31" width="3" settings="3">
          <c>1</c>
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="28" width="3" settings="3">
          <c>1</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="25" width="4" settings="4">
          <c>0</c>
          <c>1</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="21" name="L" usename="1" settings="1" psbits="x">
          <c>0</c>
        </box>
        <box hibit="20" width="2" settings="2">
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="18" width="3" name="op1" usename="1">
          <c colspan="3"/>
        </box>
        <box hibit="15" width="4" name="CRn" usename="1" settings="3" psbits="xxxx">
          <c>1</c>
          <c>0</c>
          <c>0</c>
          <c>x</c>
        </box>
        <box hibit="11" width="4" name="CRm" usename="1">
          <c colspan="4"/>
        </box>
        <box hibit="7" width="3" name="op2" usename="1">
          <c colspan="3"/>
        </box>
        <box hibit="4" width="5" name="Rt" usename="1">
          <c colspan="5"/>
        </box>
      </regdiagram>
      <encoding name="TLBIP_SYSP_CR_syspairinstrs" oneofinclass="1" oneof="1" label="">
        <docvars>
          <docvar key="instr-class" value="system"/>
          <docvar key="isa" value="A64"/>
          <docvar key="mnemonic" value="SYSP"/>
          <docvar key="alias_mnemonic" value="TLBIP"/>
        </docvars>
        <asmtemplate><text>TLBIP  </text><a hover="Is a TLBIP operation name, as listed for the TLBIP system pair instruction group, " link="tlbip_op_option">&lt;tlbip_op&gt;</a><text>{, </text><a hover="Is the 64-bit name of the first optional general-purpose source register, defaulting to '11111', encoded in the &quot;Rt&quot; field." link="Xt1_register">&lt;Xt1&gt;</a><text>, </text><a hover="Is the 64-bit name of the second optional general-purpose source register, defaulting to '11111', encoded as &quot;Rt&quot; +1. Defaults to '11111' if &quot;Rt&quot; = '11111'." link="Xt2">&lt;Xt2&gt;</a><text>}</text></asmtemplate>
        <equivalent_to>
          <asmtemplate><a href="sysp.xml#SYSP_CR_syspairinstrs">SYSP</a><text>  #</text><a hover="Is a 3-bit unsigned immediate, in the range 0 to 7, encoded in the &quot;op1&quot; field." href="sysp.xml#op1">&lt;op1&gt;</a><text>, </text><a hover="Is a name 'Cn', with 'n' in the range 0 to 15, encoded in the &quot;CRn&quot; field." href="sysp.xml#Cn">&lt;Cn&gt;</a><text>, </text><a hover="Is a name 'Cm', with 'm' in the range 0 to 15, encoded in the &quot;CRm&quot; field." href="sysp.xml#Cm">&lt;Cm&gt;</a><text>, #</text><a hover="Is a 3-bit unsigned immediate, in the range 0 to 7, encoded in the &quot;op2&quot; field." href="sysp.xml#op2">&lt;op2&gt;</a><text>{, </text><a hover="Is the 64-bit name of the first optional general-purpose source register, defaulting to '11111', encoded in the &quot;Rt&quot; field." href="sysp.xml#Xt1_register">&lt;Xt1&gt;</a><text>, </text><a hover="Is the 64-bit name of the second optional general-purpose source register, defaulting to '11111', encoded as &quot;Rt&quot; +1. Defaults to '11111' if &quot;Rt&quot; = '11111'." href="sysp.xml#Xt2">&lt;Xt2&gt;</a><text>}</text></asmtemplate>
          <aliascond>SysOp128(op1, CRn, CRm, op2) == Sys_TLBIP</aliascond>
        </equivalent_to>
      </encoding>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="TLBIP_SYSP_CR_syspairinstrs" symboldefcount="1">
      <symbol link="tlbip_op_option">&lt;tlbip_op&gt;</symbol>
      <definition encodedin="(op1 :: CRn :: CRm :: op2)">
        <intro>Is a TLBIP operation name, as listed for the TLBIP system pair instruction group, </intro>
        <table class="valuetable">
          <tgroup cols="7">
            <thead>
              <row>
                <entry class="bitfield">op1</entry>
                <entry class="bitfield">CRn</entry>
                <entry class="bitfield">CRm</entry>
                <entry class="bitfield">op2</entry>
                <entry class="symbol">&lt;tlbip_op&gt;</entry>
                <entry class="symbol">Architectural Feature</entry>
                <entry class="symbol">Description</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vae1os.xml" state="AArch64">TLBIP VAE1OS, TLBIP VAE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">VAAE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vaae1os.xml" state="AArch64">TLBIP VAAE1OS, TLBIP VAAE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vale1os.xml" state="AArch64">TLBIP VALE1OS, TLBIP VALE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">VAALE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vaale1os.xml" state="AArch64">TLBIP VAALE1OS, TLBIP VAALE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE1IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvae1is.xml" state="AArch64">TLBIP RVAE1IS, TLBIP RVAE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">RVAAE1IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvaae1is.xml" state="AArch64">TLBIP RVAAE1IS, TLBIP RVAAE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE1IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvale1is.xml" state="AArch64">TLBIP RVALE1IS, TLBIP RVALE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">RVAALE1IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvaale1is.xml" state="AArch64">TLBIP RVAALE1IS, TLBIP RVAALE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE1IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vae1is.xml" state="AArch64">TLBIP VAE1IS, TLBIP VAE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">VAAE1IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vaae1is.xml" state="AArch64">TLBIP VAAE1IS, TLBIP VAAE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE1IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vale1is.xml" state="AArch64">TLBIP VALE1IS, TLBIP VALE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">VAALE1IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vaale1is.xml" state="AArch64">TLBIP VAALE1IS, TLBIP VAALE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvae1os.xml" state="AArch64">TLBIP RVAE1OS, TLBIP RVAE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">RVAAE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvaae1os.xml" state="AArch64">TLBIP RVAAE1OS, TLBIP RVAAE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvale1os.xml" state="AArch64">TLBIP RVALE1OS, TLBIP RVALE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">RVAALE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvaale1os.xml" state="AArch64">TLBIP RVAALE1OS, TLBIP RVAALE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE1</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvae1.xml" state="AArch64">TLBIP RVAE1, TLBIP RVAE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">RVAAE1</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvaae1.xml" state="AArch64">TLBIP RVAAE1, TLBIP RVAAE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE1</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvale1.xml" state="AArch64">TLBIP RVALE1, TLBIP RVALE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">RVAALE1</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvaale1.xml" state="AArch64">TLBIP RVAALE1, TLBIP RVAALE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE1</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vae1.xml" state="AArch64">TLBIP VAE1, TLBIP VAE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">VAAE1</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vaae1.xml" state="AArch64">TLBIP VAAE1, TLBIP VAAE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE1</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vale1.xml" state="AArch64">TLBIP VALE1, TLBIP VALE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">VAALE1</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vaale1.xml" state="AArch64">TLBIP VAALE1, TLBIP VAALE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vae1os.xml" state="AArch64">TLBIP VAE1OS, TLBIP VAE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">VAAE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vaae1os.xml" state="AArch64">TLBIP VAAE1OS, TLBIP VAAE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vale1os.xml" state="AArch64">TLBIP VALE1OS, TLBIP VALE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">VAALE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vaale1os.xml" state="AArch64">TLBIP VAALE1OS, TLBIP VAALE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvae1is.xml" state="AArch64">TLBIP RVAE1IS, TLBIP RVAE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">RVAAE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvaae1is.xml" state="AArch64">TLBIP RVAAE1IS, TLBIP RVAAE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvale1is.xml" state="AArch64">TLBIP RVALE1IS, TLBIP RVALE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">RVAALE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvaale1is.xml" state="AArch64">TLBIP RVAALE1IS, TLBIP RVAALE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vae1is.xml" state="AArch64">TLBIP VAE1IS, TLBIP VAE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">VAAE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vaae1is.xml" state="AArch64">TLBIP VAAE1IS, TLBIP VAAE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vale1is.xml" state="AArch64">TLBIP VALE1IS, TLBIP VALE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">VAALE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vaale1is.xml" state="AArch64">TLBIP VAALE1IS, TLBIP VAALE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvae1os.xml" state="AArch64">TLBIP RVAE1OS, TLBIP RVAE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">RVAAE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvaae1os.xml" state="AArch64">TLBIP RVAAE1OS, TLBIP RVAAE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvale1os.xml" state="AArch64">TLBIP RVALE1OS, TLBIP RVALE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">RVAALE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvaale1os.xml" state="AArch64">TLBIP RVAALE1OS, TLBIP RVAALE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvae1.xml" state="AArch64">TLBIP RVAE1, TLBIP RVAE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">RVAAE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvaae1.xml" state="AArch64">TLBIP RVAAE1, TLBIP RVAAE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvale1.xml" state="AArch64">TLBIP RVALE1, TLBIP RVALE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">RVAALE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvaale1.xml" state="AArch64">TLBIP RVAALE1, TLBIP RVAALE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vae1.xml" state="AArch64">TLBIP VAE1, TLBIP VAE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">VAAE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vaae1.xml" state="AArch64">TLBIP VAAE1, TLBIP VAAE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vale1.xml" state="AArch64">TLBIP VALE1, TLBIP VALE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">VAALE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vaale1.xml" state="AArch64">TLBIP VAALE1, TLBIP VAALE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0000</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">IPAS2E1IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ipas2e1is.xml" state="AArch64">TLBIP IPAS2E1IS, TLBIP IPAS2E1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0000</entry>
                <entry class="bitfield">010</entry>
                <entry class="symbol">RIPAS2E1IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ripas2e1is.xml" state="AArch64">TLBIP RIPAS2E1IS, TLBIP RIPAS2E1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0000</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">IPAS2LE1IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ipas2le1is.xml" state="AArch64">TLBIP IPAS2LE1IS, TLBIP IPAS2LE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0000</entry>
                <entry class="bitfield">110</entry>
                <entry class="symbol">RIPAS2LE1IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ripas2le1is.xml" state="AArch64">TLBIP RIPAS2LE1IS, TLBIP RIPAS2LE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE2OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vae2os.xml" state="AArch64">TLBIP VAE2OS, TLBIP VAE2OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE2OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vale2os.xml" state="AArch64">TLBIP VALE2OS, TLBIP VALE2OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE2IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvae2is.xml" state="AArch64">TLBIP RVAE2IS, TLBIP RVAE2ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE2IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvale2is.xml" state="AArch64">TLBIP RVALE2IS, TLBIP RVALE2ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE2IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vae2is.xml" state="AArch64">TLBIP VAE2IS, TLBIP VAE2ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE2IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vale2is.xml" state="AArch64">TLBIP VALE2IS, TLBIP VALE2ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">IPAS2E1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ipas2e1os.xml" state="AArch64">TLBIP IPAS2E1OS, TLBIP IPAS2E1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">IPAS2E1</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ipas2e1.xml" state="AArch64">TLBIP IPAS2E1, TLBIP IPAS2E1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">010</entry>
                <entry class="symbol">RIPAS2E1</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ripas2e1.xml" state="AArch64">TLBIP RIPAS2E1, TLBIP RIPAS2E1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">RIPAS2E1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ripas2e1os.xml" state="AArch64">TLBIP RIPAS2E1OS, TLBIP RIPAS2E1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">100</entry>
                <entry class="symbol">IPAS2LE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ipas2le1os.xml" state="AArch64">TLBIP IPAS2LE1OS, TLBIP IPAS2LE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">IPAS2LE1</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ipas2le1.xml" state="AArch64">TLBIP IPAS2LE1, TLBIP IPAS2LE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">110</entry>
                <entry class="symbol">RIPAS2LE1</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ripas2le1.xml" state="AArch64">TLBIP RIPAS2LE1, TLBIP RIPAS2LE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">RIPAS2LE1OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ripas2le1os.xml" state="AArch64">TLBIP RIPAS2LE1OS, TLBIP RIPAS2LE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE2OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvae2os.xml" state="AArch64">TLBIP RVAE2OS, TLBIP RVAE2OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE2OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvale2os.xml" state="AArch64">TLBIP RVALE2OS, TLBIP RVALE2OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE2</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvae2.xml" state="AArch64">TLBIP RVAE2, TLBIP RVAE2NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE2</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvale2.xml" state="AArch64">TLBIP RVALE2, TLBIP RVALE2NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE2</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vae2.xml" state="AArch64">TLBIP VAE2, TLBIP VAE2NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE2</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vale2.xml" state="AArch64">TLBIP VALE2, TLBIP VALE2NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0000</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">IPAS2E1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ipas2e1is.xml" state="AArch64">TLBIP IPAS2E1IS, TLBIP IPAS2E1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0000</entry>
                <entry class="bitfield">010</entry>
                <entry class="symbol">RIPAS2E1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ripas2e1is.xml" state="AArch64">TLBIP RIPAS2E1IS, TLBIP RIPAS2E1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0000</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">IPAS2LE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ipas2le1is.xml" state="AArch64">TLBIP IPAS2LE1IS, TLBIP IPAS2LE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0000</entry>
                <entry class="bitfield">110</entry>
                <entry class="symbol">RIPAS2LE1ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ripas2le1is.xml" state="AArch64">TLBIP RIPAS2LE1IS, TLBIP RIPAS2LE1ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE2OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vae2os.xml" state="AArch64">TLBIP VAE2OS, TLBIP VAE2OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE2OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vale2os.xml" state="AArch64">TLBIP VALE2OS, TLBIP VALE2OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE2ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvae2is.xml" state="AArch64">TLBIP RVAE2IS, TLBIP RVAE2ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE2ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvale2is.xml" state="AArch64">TLBIP RVALE2IS, TLBIP RVALE2ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE2ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vae2is.xml" state="AArch64">TLBIP VAE2IS, TLBIP VAE2ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE2ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vale2is.xml" state="AArch64">TLBIP VALE2IS, TLBIP VALE2ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">IPAS2E1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ipas2e1os.xml" state="AArch64">TLBIP IPAS2E1OS, TLBIP IPAS2E1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">IPAS2E1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ipas2e1.xml" state="AArch64">TLBIP IPAS2E1, TLBIP IPAS2E1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">010</entry>
                <entry class="symbol">RIPAS2E1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ripas2e1.xml" state="AArch64">TLBIP RIPAS2E1, TLBIP RIPAS2E1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">011</entry>
                <entry class="symbol">RIPAS2E1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ripas2e1os.xml" state="AArch64">TLBIP RIPAS2E1OS, TLBIP RIPAS2E1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">100</entry>
                <entry class="symbol">IPAS2LE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ipas2le1os.xml" state="AArch64">TLBIP IPAS2LE1OS, TLBIP IPAS2LE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">IPAS2LE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ipas2le1.xml" state="AArch64">TLBIP IPAS2LE1, TLBIP IPAS2LE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">110</entry>
                <entry class="symbol">RIPAS2LE1NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ripas2le1.xml" state="AArch64">TLBIP RIPAS2LE1, TLBIP RIPAS2LE1NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0100</entry>
                <entry class="bitfield">111</entry>
                <entry class="symbol">RIPAS2LE1OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-ripas2le1os.xml" state="AArch64">TLBIP RIPAS2LE1OS, TLBIP RIPAS2LE1OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE2OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvae2os.xml" state="AArch64">TLBIP RVAE2OS, TLBIP RVAE2OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE2OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvale2os.xml" state="AArch64">TLBIP RVALE2OS, TLBIP RVALE2OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE2NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvae2.xml" state="AArch64">TLBIP RVAE2, TLBIP RVAE2NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE2NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvale2.xml" state="AArch64">TLBIP RVALE2, TLBIP RVALE2NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE2NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vae2.xml" state="AArch64">TLBIP VAE2, TLBIP VAE2NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">100</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE2NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vale2.xml" state="AArch64">TLBIP VALE2, TLBIP VALE2NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE3OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vae3os.xml" state="AArch64">TLBIP VAE3OS, TLBIP VAE3OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE3OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vale3os.xml" state="AArch64">TLBIP VALE3OS, TLBIP VALE3OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE3IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvae3is.xml" state="AArch64">TLBIP RVAE3IS, TLBIP RVAE3ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE3IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvale3is.xml" state="AArch64">TLBIP RVALE3IS, TLBIP RVALE3ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE3IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vae3is.xml" state="AArch64">TLBIP VAE3IS, TLBIP VAE3ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE3IS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vale3is.xml" state="AArch64">TLBIP VALE3IS, TLBIP VALE3ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE3OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvae3os.xml" state="AArch64">TLBIP RVAE3OS, TLBIP RVAE3OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE3OS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvale3os.xml" state="AArch64">TLBIP RVALE3OS, TLBIP RVALE3OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE3</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvae3.xml" state="AArch64">TLBIP RVAE3, TLBIP RVAE3NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE3</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvale3.xml" state="AArch64">TLBIP RVALE3, TLBIP RVALE3NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE3</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vae3.xml" state="AArch64">TLBIP VAE3, TLBIP VAE3NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1000</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE3</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vale3.xml" state="AArch64">TLBIP VALE3, TLBIP VALE3NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE3OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vae3os.xml" state="AArch64">TLBIP VAE3OS, TLBIP VAE3OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE3OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vale3os.xml" state="AArch64">TLBIP VALE3OS, TLBIP VALE3OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE3ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvae3is.xml" state="AArch64">TLBIP RVAE3IS, TLBIP RVAE3ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0010</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE3ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvale3is.xml" state="AArch64">TLBIP RVALE3IS, TLBIP RVALE3ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE3ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vae3is.xml" state="AArch64">TLBIP VAE3IS, TLBIP VAE3ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0011</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE3ISNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vale3is.xml" state="AArch64">TLBIP VALE3IS, TLBIP VALE3ISNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE3OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvae3os.xml" state="AArch64">TLBIP RVAE3OS, TLBIP RVAE3OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE3OSNXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvale3os.xml" state="AArch64">TLBIP RVALE3OS, TLBIP RVALE3OSNXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">RVAE3NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvae3.xml" state="AArch64">TLBIP RVAE3, TLBIP RVAE3NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0110</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">RVALE3NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-rvale3.xml" state="AArch64">TLBIP RVALE3, TLBIP RVALE3NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">VAE3NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vae3.xml" state="AArch64">TLBIP VAE3, TLBIP VAE3NXS</register_link>.</para>
                </entry>
              </row>
              <row>
                <entry class="bitfield">110</entry>
                <entry class="bitfield">1001</entry>
                <entry class="bitfield">0111</entry>
                <entry class="bitfield">101</entry>
                <entry class="symbol">VALE3NXS</entry>
                <entry class="feature">
                  <arch_variants>
                    <arch_variant feature="FEAT_D128"/>
                  </arch_variants>
                </entry>
                <entry class="description">
                  <para>For more information, see <register_link id="AArch64-tlbip-vale3.xml" state="AArch64">TLBIP VALE3, TLBIP VALE3NXS</register_link>.</para>
                </entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </definition>
    </explanation>
    <explanation enclist="TLBIP_SYSP_CR_syspairinstrs" symboldefcount="1">
      <symbol link="Xt1_register">&lt;Xt1&gt;</symbol>
      <account encodedin="Rt">
        <intro>
          <para>Is the 64-bit name of the first optional general-purpose source register, defaulting to '11111', encoded in the &quot;Rt&quot; field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="TLBIP_SYSP_CR_syspairinstrs" symboldefcount="1">
      <symbol link="Xt2">&lt;Xt2&gt;</symbol>
      <account encodedin="Rt">
        <intro>
          <para>Is the 64-bit name of the second optional general-purpose source register, defaulting to '11111', encoded as &quot;Rt&quot; +1. Defaults to '11111' if &quot;Rt&quot; = '11111'.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
  <timestamp>2026-03-26 20:27:25</timestamp>
  <commit_id>2026-03_rel</commit_id>
</instructionsection>