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ADDG -- A64

ADDG

Add with tag

This instruction adds an immediate value scaled by the Tag Granule to the address in the source register, modifies the Logical Address Tag of the address using an immediate value, and writes the result to the destination register. Tags specified in GCR_EL1.Exclude are excluded from the possible outputs when modifying the Logical Address Tag.

Integer
(FEAT_MTE)

313029282726252423222120191817161514131211109876543210
1001000110imm6(0)(0)imm4RnRd
sfopSop3

Encoding

ADDG <Xd|SP>, <Xn|SP>, #<uimm6>, #<uimm4>

Decode for this encoding

if !IsFeatureImplemented(FEAT_MTE) then EndOfDecode(Decode_UNDEF); end; let d : integer{} = UInt(Rd); let n : integer{} = UInt(Rn); let tag_offset : bits(4) = imm4; let offset : bits(64) = LSL(ZeroExtend{64}(imm6), LOG2_TAG_GRANULE);

Assembler Symbols

<Xd|SP>

Is the 64-bit name of the destination general-purpose register or stack pointer, encoded in the "Rd" field.

<Xn|SP>

Is the 64-bit name of the source general-purpose register or stack pointer, encoded in the "Rn" field.

<uimm6>

Is an unsigned immediate, a multiple of 16 in the range 0 to 1008, encoded in the "imm6" field.

<uimm4>

Is an unsigned immediate, in the range 0 to 15, encoded in the "imm4" field.

Operation

let operand1 : bits(64) = if n == 31 then SP{64}() else X{64}(n); let start_tag : bits(4) = AArch64_AllocationTagFromAddress(operand1); let exclude : bits(16) = GCR_EL1().Exclude; let rtag : bits(4) = AArch64_ChooseNonExcludedTagOrZero(start_tag, tag_offset, exclude); var result : bits(64); (result, -) = AddWithCarry{64}(operand1, offset, '0'); result = AArch64_AddressWithAllocationTag(result, rtag); if d == 31 then SP{64}() = result; else X{64}(d) = result; end;


2026-03_rel 2026-03-26 20:48:11

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