This is a collection of Intel®’ IA32® Software Developer's Manuals (URL of the day) and AMD' AMD64 Architecture Programmer's Manual together with the related specifications, application notes, white papers, and change logs. The collection aims to keep all available revisions. It was originally created by Michal Necasek, see OS/2 Museum.

If you have a public document, related to the IA32® specifications and missing from the collection, please mail it to me. The content of this URL and all sub-ULRs is available for convenient bulk download by rsync x86docs password "" (empty).

CBZ -- A64

CBZ

Compare and branch on zero

This instruction compares the value in a register with zero, and conditionally branches to a label at a PC-relative offset if the comparison is equal. This instruction provides a hint that this is not a subroutine call or return. This instruction does not affect condition flags.

313029282726252423222120191817161514131211109876543210
sf0110100imm19Rt
op

Encoding for the 32-bit variant

Applies when (sf == 0)

CBZ <Wt>, <label>

Encoding for the 64-bit variant

Applies when (sf == 1)

CBZ <Xt>, <label>

Decode for all variants of this encoding

let t : integer = UInt(Rt); let datasize : integer{} = 32 << UInt(sf); let offset : bits(64) = SignExtend{}(imm19::'00');

Assembler Symbols

<Wt>

Is the 32-bit name of the general-purpose register to be tested, encoded in the "Rt" field.

<label>

Is the program label to be conditionally branched to. Its offset from the address of this instruction, in the range +/-1MB, is encoded as "imm19" times 4.

<Xt>

Is the 64-bit name of the general-purpose register to be tested, encoded in the "Rt" field.


2026-03_rel 2026-03-26 20:48:11

Copyright © 2010-2026 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.