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IRG -- A64

IRG

Insert random tag

This instruction inserts a random Logical Address Tag into the address in the first source register, and writes the result to the destination register. Any tags specified in the optional second source register or in GCR_EL1.Exclude are excluded from the selection of the random Logical Address Tag.

Integer
(FEAT_MTE)

313029282726252423222120191817161514131211109876543210
10011010110Rm000100RnRd
sfSopcode

Encoding

IRG <Xd|SP>, <Xn|SP>{, <Xm>}

Decode for this encoding

if !IsFeatureImplemented(FEAT_MTE) then EndOfDecode(Decode_UNDEF); end; let d : integer{} = UInt(Rd); let n : integer{} = UInt(Rn); let m : integer{} = UInt(Rm);

Assembler Symbols

<Xd|SP>

Is the 64-bit name of the destination general-purpose register or stack pointer, encoded in the "Rd" field.

<Xn|SP>

Is the 64-bit name of the first source general-purpose register or stack pointer, encoded in the "Rn" field.

<Xm>

Is the 64-bit name of the second general-purpose source register, encoded in the "Rm" field. Defaults to XZR if absent.

Operation

let operand : bits(64) = if n == 31 then SP{64}() else X{64}(n); let exclude_reg : bits(64) = X{}(m); let exclude : bits(16) = exclude_reg[15:0] OR GCR_EL1().Exclude; let rtag : bits(4) = AArch64_ChooseTagOrZero(exclude); let result : bits(64) = AArch64_AddressWithAllocationTag(operand, rtag); if d == 31 then SP{64}() = result; else X{64}(d) = result; end;


2026-03_rel 2026-03-26 20:48:11

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