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LDFMAX, LDFMAXA, LDFMAXAL, LDFMAXL

Atomic floating-point maximum

This instruction atomically loads a 16-bit, 32-bit, or 64-bit value from memory, calculates the floating-point maximum with the value held in a register, and stores the result back to memory. The value initially loaded from memory is returned in the destination register.

• LDFMAXA and LDFMAXAL load from memory with acquire semantics.
• LDFMAXL and LDFMAXAL store to memory with release semantics.
• LDFMAX has neither acquire nor release semantics.

This instruction:

• Disables alternative floating-point behaviors, as if FPCR.AH is 0.
• Generates only the default NaN, as if FPCR.DN is 1.
• Does not modify the cumulative FPSR exception bits (IDC, IXC, UFC, OFC, DZC, and IOC).
• Disables trapped floating-point exceptions, as if the FPCR trap enable bits (IDE, IXE, UFE, OFE, DZE, and IOE) are all zero.

For more information about memory ordering semantics, see Load-Acquire, Store-Release.

For information about addressing modes, see Load/Store addressing modes.

Floating-point
(FEAT_LSFE)

Decode for all variants of this encoding

if !IsFeatureImplemented(FEAT_LSFE) then EndOfDecode(Decode_UNDEF); end; let t : integer = UInt(Rt); let n : integer = UInt(Rn); let s : integer = UInt(Rs); let datasize : integer{} = 8 << UInt(size); let acquire : boolean = A == '1'; let release : boolean = R == '1'; let tagchecked : boolean = n != 31;