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<instructionsection id="CMN_i" title="CMN (immediate) -- AArch32" type="instruction">
  <docvars>
    <docvar key="instr-class" value="general"/>
    <docvar key="mnemonic" value="CMN"/>
  </docvars>
  <heading>CMN (immediate)</heading>
  <desc>
    <brief>
      <para>Compare Negative (immediate)</para>
    </brief>
    <authored>
      <para>Compare Negative (immediate) adds a register value and an
immediate value. It updates the condition flags based on the result,
and discards the result.</para>
    </authored>
    <encodingnotes>
      <para>For more information about the <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> behavior, see <xref linkend="ARMARM_CJAEGDJC">Architectural Constraints on UNPREDICTABLE behaviors</xref>.</para>
    </encodingnotes>
  </desc>
  <operationalnotes>
    <operationalnote>
      <operationalnote_content>
        <para>This instruction is a data-independent-time instruction as described in <xref linkend="ARMARM_BEIIDCEG">About the DIT bit</xref>.</para>
      </operationalnote_content>
    </operationalnote>
  </operationalnotes>
  <alias_list howmany="0"/>
  <classes>
    <classesintro count="2">
      <txt>It has encodings from the following instruction sets:</txt>
      <txt> A32 (</txt>
      <a href="#iclass_a1">A1</a>
      <txt>)</txt>
      <txt> and </txt>
      <txt> T32 (</txt>
      <a href="#iclass_t1">T1</a>
      <txt>)</txt>
      <txt>.</txt>
    </classesintro>
    <iclass name="A1" oneof="2" id="iclass_a1" no_encodings="1" isa="A32">
      <docvars>
        <docvar key="armarmheading" value="A1"/>
        <docvar key="instr-class" value="general"/>
        <docvar key="isa" value="A32"/>
        <docvar key="mnemonic" value="CMN"/>
      </docvars>
      <iclassintro count="1"/>
      <regdiagram form="32" psname="A32.dp.dpimm.intdp1reg_imm.CMN_i_A1" tworows="1">
        <box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
          <c colspan="4">!= 1111</c>
        </box>
        <box hibit="27" width="2" settings="2">
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="25" width="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="24" width="2" settings="2">
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="22" width="2" name="opc" usename="1" settings="2" psbits="xx">
          <c>1</c>
          <c>1</c>
        </box>
        <box hibit="20" width="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="19" width="4" name="Rn" usename="1">
          <c colspan="4"/>
        </box>
        <box hibit="15" width="4" settings="4">
          <c>(0)</c>
          <c>(0)</c>
          <c>(0)</c>
          <c>(0)</c>
        </box>
        <box hibit="11" width="12" name="imm12" usename="1">
          <c colspan="12"/>
        </box>
      </regdiagram>
      <encoding name="CMN_i_A1" oneofinclass="1" oneof="2" label="">
        <docvars>
          <docvar key="armarmheading" value="A1"/>
          <docvar key="instr-class" value="general"/>
          <docvar key="isa" value="A32"/>
          <docvar key="mnemonic" value="CMN"/>
        </docvars>
        <asmtemplate><text>CMN{</text><a hover="See x[Standard assembler syntax fields](Babbefhf)." link="cond__2">&lt;c&gt;</a><text>}{</text><a hover="See x[Standard assembler syntax fields](Babbefhf)." link="qw_option">&lt;q&gt;</a><text>}  </text><a hover="For the &quot;A1&quot; variant: is the general-purpose source register, encoded in the &quot;Rn&quot; field. The PC can be used, but this is deprecated." link="Rn__22">&lt;Rn&gt;</a><text>, #</text><a hover="For the &quot;A1&quot; variant: an immediate value. See x[Modified immediate constants in A32 instructions](BABHDAJF) for the range of values." link="const__14">&lt;const&gt;</a></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="A32.dp.dpimm.intdp1reg_imm.CMN_i_A1" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">let n : integer = UInt(Rn);
let imm32 : bits(32) = A32ExpandImm(imm12);</pstext></ps>
      </ps_section>
    </iclass>
    <iclass name="T1" oneof="2" id="iclass_t1" no_encodings="1" isa="T32">
      <docvars>
        <docvar key="armarmheading" value="T1"/>
        <docvar key="instr-class" value="general"/>
        <docvar key="isa" value="T32"/>
        <docvar key="mnemonic" value="CMN"/>
      </docvars>
      <iclassintro count="1"/>
      <regdiagram form="16x2" psname="T32.w.dpint_immm.CMN_i_T1" tworows="1">
        <box hibit="31" width="3" settings="3">
          <c>1</c>
          <c>1</c>
          <c>1</c>
        </box>
        <box hibit="28" width="2" settings="2">
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="26" width="1" name="i" usename="1">
          <c colspan="1"/>
        </box>
        <box hibit="25" width="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="24" width="4" name="op1" usename="1" settings="4" psbits="xxxx">
          <c>1</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="20" name="S" usename="1" settings="1" psbits="x">
          <c>1</c>
        </box>
        <box hibit="19" width="4" name="Rn" usename="1">
          <c colspan="4"/>
        </box>
        <box hibit="15" width="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="14" width="3" name="imm3" usename="1">
          <c colspan="3"/>
        </box>
        <box hibit="11" width="4" name="Rd" usename="1" settings="4" psbits="xxxx">
          <c>1</c>
          <c>1</c>
          <c>1</c>
          <c>1</c>
        </box>
        <box hibit="7" width="8" name="imm8" usename="1">
          <c colspan="8"/>
        </box>
      </regdiagram>
      <encoding name="CMN_i_T1" oneofinclass="1" oneof="2" label="">
        <docvars>
          <docvar key="armarmheading" value="T1"/>
          <docvar key="instr-class" value="general"/>
          <docvar key="isa" value="T32"/>
          <docvar key="mnemonic" value="CMN"/>
        </docvars>
        <asmtemplate><text>CMN{</text><a hover="See x[Standard assembler syntax fields](Babbefhf)." link="cond__2">&lt;c&gt;</a><text>}{</text><a hover="See x[Standard assembler syntax fields](Babbefhf)." link="qw_option">&lt;q&gt;</a><text>}  </text><a hover="For the &quot;T1&quot; variant: is the general-purpose source register, encoded in the &quot;Rn&quot; field." link="Rn__38">&lt;Rn&gt;</a><text>, #</text><a hover="For the &quot;T1&quot; variant: an immediate value. See x[Modified immediate constants in T32 instructions](BABGHAGA) for the range of values." link="i_imm3_imm8">&lt;const&gt;</a></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="T32.w.dpint_immm.CMN_i_T1" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">let n : integer = UInt(Rn);
let imm32 : bits(32) = T32ExpandImm(i::imm3::imm8);
if n == 15 then UnpredictableProcedure(); end;</pstext></ps>
      </ps_section>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="CMN_i_A1, CMN_i_T1" symboldefcount="1">
      <symbol link="cond__2">&lt;c&gt;</symbol>
      <account encodedin="cond">
        <intro>
          <para>See <xref linkend="Babbefhf">Standard assembler syntax fields</xref>.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="CMN_i_A1, CMN_i_T1" symboldefcount="1">
      <symbol link="qw_option">&lt;q&gt;</symbol>
      <account encodedin="">
        <intro>
          <para>See <xref linkend="Babbefhf">Standard assembler syntax fields</xref>.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="CMN_i_A1" symboldefcount="1">
      <symbol link="Rn__22">&lt;Rn&gt;</symbol>
      <account encodedin="Rn">
        <intro>
          <para>For the "A1" variant: is the general-purpose source register, encoded in the "Rn" field. The PC can be used, but this is deprecated.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="CMN_i_T1" symboldefcount="2">
      <symbol link="Rn__38">&lt;Rn&gt;</symbol>
      <account encodedin="Rn">
        <intro>
          <para>For the "T1" variant: is the general-purpose source register, encoded in the "Rn" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="CMN_i_A1" symboldefcount="1">
      <symbol link="const__14">&lt;const&gt;</symbol>
      <account encodedin="imm12">
        <intro>
          <para>For the "A1" variant: an immediate value. See <xref linkend="BABHDAJF">Modified immediate constants in A32 instructions</xref> for the range of values.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="CMN_i_T1" symboldefcount="2">
      <symbol link="i_imm3_imm8">&lt;const&gt;</symbol>
      <account encodedin="(i :: imm3 :: imm8)">
        <intro>
          <para>For the "T1" variant: an immediate value. See <xref linkend="BABGHAGA">Modified immediate constants in T32 instructions</xref> for the range of values.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
  <ps_section howmany="1">
    <ps name="A32.dp.dpimm.intdp1reg_imm.CMN_i_A1" sections="1" secttype="Operation">
      <pstext mayhavelinks="1" section="Execute" rep_section="execute">if ConditionPassed() then
    EncodingSpecificOperations();
    let (result, nzcv) : (bits(32), bits(4)) = AddWithCarry{32}(R(n), imm32, '0');
    PSTATE.[N,Z,C,V] = nzcv;
end;</pstext></ps>
  </ps_section>
  <timestamp>2026-03-12 12:23:09</timestamp>
  <commit_id>2025-09_rel_asl1</commit_id>
</instructionsection>
