CPS, CPSID, CPSIE Change PE State Change PE State changes one or more of the PSTATE.{A, I, F} interrupt mask bits and, optionally, the PSTATE.M mode field, without changing any other PSTATE bits. CPS is treated as NOP if executed in User mode unless it is defined as being CONSTRAINED UNPREDICTABLE elsewhere in this section. The PE checks whether the value being written to PSTATE.M is legal. See Illegal changes to PSTATE.M. Hint instructions: In encoding T2, if the imod field is 0b00 and the M bit is 0b0, a hint instruction is encoded. To determine which hint instruction, see Branches and miscellaneous control. For more information about the CONSTRAINED UNPREDICTABLE behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors. It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 and T2 ) . 1 1 1 1 0 0 0 1 0 0 0 0 0 (0) (0) (0) (0) (0) (0) (0) 0 0 0 1 CPS{<q>} #<mode> 1 1 0 CPSID{<q>} <iflags> 1 1 1 CPSID{<q>} <iflags> , #<mode> 1 0 0 CPSIE{<q>} <iflags> 1 0 1 CPSIE{<q>} <iflags> , #<mode> if mode != '00000' && M == '0' then UnpredictableProcedure(); end; if (imod[1] == '1' && A::I::F == '000') || (imod[1] == '0' && A::I::F != '000') then UnpredictableProcedure(); end; let enable : boolean = (imod == '10'); let disable : boolean = (imod == '11'); let changemode : boolean = (M == '1'); let pemode : bits(5) = mode; let affectA : boolean = (A == '1'); let affectI : boolean = (I == '1'); let affectF : boolean = (F == '1'); if (imod == '00' && M == '0') || imod == '01' then UnpredictableProcedure(); end; imod == '01' imod == '00' && M == '0' mode != '00000' && M == '0' The instruction executes as described, and the value specified by mode is ignored. There are no additional side-effects. imod<1> == '1' && A:I:F == '000' The instruction behaves as if imod<1> == '0'. The instruction behaves as if A:I:F has an UNKNOWN nonzero value. imod<1> == '0' && A:I:F != '000' The instruction behaves as if imod<1> == '1'. The instruction behaves as if A:I:F == '000'. 1 0 1 1 0 1 1 0 0 1 1 (0) 1 CPSID{<q>} <iflags> 0 CPSIE{<q>} <iflags> if A::I::F == '000' then UnpredictableProcedure(); end; let enable : boolean = (im == '0'); let disable : boolean = (im == '1'); let changemode : boolean = FALSE; let affectA : boolean = (A == '1'); let affectI : boolean = (I == '1'); let affectF : boolean = (F == '1'); let pemode : bits(5) = ARBITRARY : bits(5); if InITBlock() then UnpredictableProcedure(); end; A:I:F == '000' 1 1 1 1 0 0 1 1 1 0 1 0 (1) (1) (1) (1) 1 0 (0) 0 (0) 0 0 1 CPS{<q>} #<mode> 1 1 0 CPSID.W <iflags> 1 1 1 CPSID{<q>} <iflags>, #<mode> 1 0 0 CPSIE.W <iflags> 1 0 1 CPSIE{<q>} <iflags>, #<mode> if imod == '00' && M == '0' then See("Hint instructions"); end; if mode != '00000' && M == '0' then UnpredictableProcedure(); end; if (imod[1] == '1' && A::I::F == '000') || (imod[1] == '0' && A::I::F != '000') then UnpredictableProcedure(); end; let enable : boolean = (imod == '10'); let disable : boolean = (imod == '11'); let changemode : boolean = (M == '1'); let pemode : bits(5) = mode; let affectA : boolean = (A == '1'); let affectI : boolean = (I == '1'); let affectF : boolean = (F == '1'); if imod == '01' || InITBlock() then UnpredictableProcedure(); end; imod == '01' mode != '00000' && M == '0' The instruction executes as described, and the value specified by mode is ignored. There are no additional side-effects. imod<1> == '1' && A:I:F == '000' The instruction behaves as if imod<1> == '0'. The instruction behaves as if A:I:F has an UNKNOWN nonzero value. imod<1> == '0' && A:I:F != '000' The instruction behaves as if imod<1> == '1'. The instruction behaves as if A:I:F == '000'. <q> See Standard assembler syntax fields. <mode> Is the number of the mode to change to, in the range 0 to 31, encoded in the "mode" field. <iflags> Is a sequence of one or more of the following, specifying which interrupt mask bits are affected: a Sets the A bit in the instruction, causing the specified effect on PSTATE.A, the SError interrupt mask bit. i Sets the I bit in the instruction, causing the specified effect on PSTATE.I, the IRQ interrupt mask bit. f Sets the F bit in the instruction, causing the specified effect on PSTATE.F, the FIQ interrupt mask bit. if CurrentInstrSet() == InstrSet_A32 then EncodingSpecificOperations(); if PSTATE.EL != EL0 then if enable then if affectA then PSTATE.A = '0'; end; if affectI then PSTATE.I = '0'; end; if affectF then PSTATE.F = '0'; end; end; if disable then if affectA then PSTATE.A = '1'; end; if affectI then PSTATE.I = '1'; end; if affectF then PSTATE.F = '1'; end; end; if changemode then // AArch32_WriteModeByInstr() sets PSTATE.IL to 1 if this is an illegal mode change. AArch32_WriteModeByInstr(pemode); end; end; else EncodingSpecificOperations(); if PSTATE.EL != EL0 then if enable then if affectA then PSTATE.A = '0'; end; if affectI then PSTATE.I = '0'; end; if affectF then PSTATE.F = '0'; end; end; if disable then if affectA then PSTATE.A = '1'; end; if affectI then PSTATE.I = '1'; end; if affectF then PSTATE.F = '1'; end; end; if changemode then // AArch32_WriteModeByInstr() sets PSTATE.IL to 1 if this is an illegal mode change. AArch32_WriteModeByInstr(pemode); end; end; end; 2026-03-12 12:23:09 2025-09_rel_asl1