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<instructionsection id="MLA" title="MLA, MLAS -- AArch32" type="instruction">
  <docvars>
    <docvar key="instr-class" value="general"/>
  </docvars>
  <heading>MLA, MLAS</heading>
  <desc>
    <brief>
      <para>Multiply Accumulate</para>
    </brief>
    <authored>
      <para>Multiply Accumulate multiplies two register values, and adds a third
register value. The least significant 32 bits of the result are
written to the destination register. These 32 bits do not depend on
whether the source register values are considered to be signed
values or unsigned values.</para>
      <para>In an A32 instruction, the condition flags can optionally be updated
based on the result. Use of this option adversely affects
performance on many implementations.</para>
    </authored>
    <encodingnotes>
      <para>For more information about the <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> behavior of this instruction, see <xref linkend="ARMARM_CJAEGDJC">Architectural Constraints on UNPREDICTABLE behaviors</xref>.</para>
    </encodingnotes>
  </desc>
  <operationalnotes>
    <operationalnote>
      <operationalnote_content>
        <para>This instruction is a data-independent-time instruction as described in <xref linkend="ARMARM_BEIIDCEG">About the DIT bit</xref>.</para>
      </operationalnote_content>
    </operationalnote>
  </operationalnotes>
  <alias_list howmany="0"/>
  <classes>
    <classesintro count="2">
      <txt>It has encodings from the following instruction sets:</txt>
      <txt> A32 (</txt>
      <a href="#iclass_a1">A1</a>
      <txt>)</txt>
      <txt> and </txt>
      <txt> T32 (</txt>
      <a href="#iclass_t1">T1</a>
      <txt>)</txt>
      <txt>.</txt>
    </classesintro>
    <iclass name="A1" oneof="2" id="iclass_a1" no_encodings="2" isa="A32">
      <docvars>
        <docvar key="armarmheading" value="A1"/>
        <docvar key="instr-class" value="general"/>
        <docvar key="isa" value="A32"/>
      </docvars>
      <iclassintro count="2"/>
      <regdiagram form="32" psname="A32.dp.mul_word.MLAS_A1" tworows="1">
        <box hibit="31" width="4" name="cond" usename="1" settings="4" constraint="!= 1111">
          <c colspan="4">!= 1111</c>
        </box>
        <box hibit="27" width="4" settings="4">
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="23" width="3" name="opc" usename="1" settings="3" psbits="xxx">
          <c>0</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="20" width="1" name="S" usename="1">
          <c colspan="1"/>
        </box>
        <box hibit="19" width="4" name="Rd" usename="1">
          <c colspan="4"/>
        </box>
        <box hibit="15" width="4" name="Ra" usename="1">
          <c colspan="4"/>
        </box>
        <box hibit="11" width="4" name="Rm" usename="1">
          <c colspan="4"/>
        </box>
        <box hibit="7" width="4" settings="4">
          <c>1</c>
          <c>0</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="3" width="4" name="Rn" usename="1">
          <c colspan="4"/>
        </box>
      </regdiagram>
      <encoding name="MLAS_A1" oneofinclass="2" oneof="3" label="Flag setting" bitdiffs="S == 1">
        <docvars>
          <docvar key="armarmheading" value="A1"/>
          <docvar key="instr-class" value="general"/>
          <docvar key="isa" value="A32"/>
          <docvar key="cond-setting" value="s"/>
          <docvar key="mnemonic" value="MLAS"/>
        </docvars>
        <box hibit="20" width="1" name="S">
          <c>1</c>
        </box>
        <asmtemplate><text>MLAS{</text><a hover="See x[Standard assembler syntax fields](Babbefhf)." link="cond__2">&lt;c&gt;</a><text>}{</text><a hover="See x[Standard assembler syntax fields](Babbefhf)." link="qw_option">&lt;q&gt;</a><text>}  </text><a hover="Is the general-purpose destination register, encoded in the &quot;Rd&quot; field." link="Rd">&lt;Rd&gt;</a><text>, </text><a hover="Is the first general-purpose source register holding the multiplicand, encoded in the &quot;Rn&quot; field." link="Rn__10">&lt;Rn&gt;</a><text>, </text><a hover="Is the second general-purpose source register holding the multiplier, encoded in the &quot;Rm&quot; field." link="Rm__15">&lt;Rm&gt;</a><text>, </text><a hover="Is the third general-purpose source register holding the addend, encoded in the &quot;Ra&quot; field." link="Ra">&lt;Ra&gt;</a></asmtemplate>
      </encoding>
      <encoding name="MLA_A1" oneofinclass="2" oneof="3" label="Not flag setting" bitdiffs="S == 0">
        <docvars>
          <docvar key="armarmheading" value="A1"/>
          <docvar key="instr-class" value="general"/>
          <docvar key="isa" value="A32"/>
          <docvar key="cond-setting" value="no-s"/>
          <docvar key="mnemonic" value="MLA"/>
        </docvars>
        <box hibit="20" width="1" name="S">
          <c>0</c>
        </box>
        <asmtemplate><text>MLA{</text><a hover="See x[Standard assembler syntax fields](Babbefhf)." link="cond__2">&lt;c&gt;</a><text>}{</text><a hover="See x[Standard assembler syntax fields](Babbefhf)." link="qw_option">&lt;q&gt;</a><text>}  </text><a hover="Is the general-purpose destination register, encoded in the &quot;Rd&quot; field." link="Rd">&lt;Rd&gt;</a><text>, </text><a hover="Is the first general-purpose source register holding the multiplicand, encoded in the &quot;Rn&quot; field." link="Rn__10">&lt;Rn&gt;</a><text>, </text><a hover="Is the second general-purpose source register holding the multiplier, encoded in the &quot;Rm&quot; field." link="Rm__15">&lt;Rm&gt;</a><text>, </text><a hover="Is the third general-purpose source register holding the addend, encoded in the &quot;Ra&quot; field." link="Ra">&lt;Ra&gt;</a></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="A32.dp.mul_word.MLAS_A1" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">let d : integer = UInt(Rd);
let n : integer = UInt(Rn);
let m : integer = UInt(Rm);
let a : integer = UInt(Ra);
let setflags : boolean = (S == '1');
if d == 15 || n == 15 || m == 15 || a == 15 then UnpredictableProcedure(); end;</pstext></ps>
      </ps_section>
    </iclass>
    <iclass name="T1" oneof="2" id="iclass_t1" no_encodings="1" isa="T32">
      <docvars>
        <docvar key="armarmheading" value="T1"/>
        <docvar key="instr-class" value="general"/>
        <docvar key="isa" value="T32"/>
        <docvar key="mnemonic" value="MLA"/>
      </docvars>
      <iclassintro count="1"/>
      <regdiagram form="16x2" psname="T32.w.mul.mul_abd.MLA_T1" tworows="1">
        <box hibit="31" width="3" settings="3">
          <c>1</c>
          <c>1</c>
          <c>1</c>
        </box>
        <box hibit="28" width="6" settings="6">
          <c>1</c>
          <c>1</c>
          <c>0</c>
          <c>1</c>
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="22" width="3" name="op1" usename="1" settings="3" psbits="xxx">
          <c>0</c>
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="19" width="4" name="Rn" usename="1">
          <c colspan="4"/>
        </box>
        <box hibit="15" width="4" name="Ra" usename="1" settings="4" constraint="!= 1111">
          <c colspan="4">!= 1111</c>
        </box>
        <box hibit="11" width="4" name="Rd" usename="1">
          <c colspan="4"/>
        </box>
        <box hibit="7" width="2" settings="2">
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="5" width="2" name="op2" usename="1" settings="2" psbits="xx">
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="3" width="4" name="Rm" usename="1">
          <c colspan="4"/>
        </box>
      </regdiagram>
      <encoding name="MLA_T1" oneofinclass="1" oneof="3" label="">
        <docvars>
          <docvar key="armarmheading" value="T1"/>
          <docvar key="instr-class" value="general"/>
          <docvar key="isa" value="T32"/>
          <docvar key="mnemonic" value="MLA"/>
        </docvars>
        <asmtemplate><text>MLA{</text><a hover="See x[Standard assembler syntax fields](Babbefhf)." link="cond__2">&lt;c&gt;</a><text>}{</text><a hover="See x[Standard assembler syntax fields](Babbefhf)." link="qw_option">&lt;q&gt;</a><text>}  </text><a hover="Is the general-purpose destination register, encoded in the &quot;Rd&quot; field." link="Rd">&lt;Rd&gt;</a><text>, </text><a hover="Is the first general-purpose source register holding the multiplicand, encoded in the &quot;Rn&quot; field." link="Rn__10">&lt;Rn&gt;</a><text>, </text><a hover="Is the second general-purpose source register holding the multiplier, encoded in the &quot;Rm&quot; field." link="Rm__15">&lt;Rm&gt;</a><text>, </text><a hover="Is the third general-purpose source register holding the addend, encoded in the &quot;Ra&quot; field." link="Ra">&lt;Ra&gt;</a></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="T32.w.mul.mul_abd.MLA_T1" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">if Ra == '1111' then See("MUL"); end;
let d : integer = UInt(Rd);
let n : integer = UInt(Rn);
let m : integer = UInt(Rm);
let a : integer = UInt(Ra);
let setflags : boolean = FALSE;
// Armv8-A removes UNPREDICTABLE for R13
if d == 15 || n == 15 || m  == 15 then UnpredictableProcedure(); end;</pstext></ps>
      </ps_section>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="MLAS_A1, MLA_A1, MLA_T1" symboldefcount="1">
      <symbol link="cond__2">&lt;c&gt;</symbol>
      <account encodedin="cond">
        <intro>
          <para>See <xref linkend="Babbefhf">Standard assembler syntax fields</xref>.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="MLAS_A1, MLA_A1, MLA_T1" symboldefcount="1">
      <symbol link="qw_option">&lt;q&gt;</symbol>
      <account encodedin="">
        <intro>
          <para>See <xref linkend="Babbefhf">Standard assembler syntax fields</xref>.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="MLAS_A1, MLA_A1, MLA_T1" symboldefcount="1">
      <symbol link="Rd">&lt;Rd&gt;</symbol>
      <account encodedin="Rd">
        <intro>
          <para>Is the general-purpose destination register, encoded in the "Rd" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="MLAS_A1, MLA_A1, MLA_T1" symboldefcount="1">
      <symbol link="Rn__10">&lt;Rn&gt;</symbol>
      <account encodedin="Rn">
        <intro>
          <para>Is the first general-purpose source register holding the multiplicand, encoded in the "Rn" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="MLAS_A1, MLA_A1, MLA_T1" symboldefcount="1">
      <symbol link="Rm__15">&lt;Rm&gt;</symbol>
      <account encodedin="Rm">
        <intro>
          <para>Is the second general-purpose source register holding the multiplier, encoded in the "Rm" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="MLAS_A1, MLA_A1, MLA_T1" symboldefcount="1">
      <symbol link="Ra">&lt;Ra&gt;</symbol>
      <account encodedin="Ra">
        <intro>
          <para>Is the third general-purpose source register holding the addend, encoded in the "Ra" field.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
  <ps_section howmany="1">
    <ps name="A32.dp.mul_word.MLAS_A1" sections="1" secttype="Operation">
      <pstext mayhavelinks="1" section="Execute" rep_section="execute">if ConditionPassed() then
    EncodingSpecificOperations();
    let operand1 : integer = SInt(R(n)); // operand1 = UInt(R[n]) produces the same final results
    let operand2 : integer = SInt(R(m)); // operand2 = UInt(R[m]) produces the same final results
    let addend : integer   = SInt(R(a)); // addend   = UInt(R[a]) produces the same final results
    let result : integer = operand1 * operand2 + addend;
    R(d) = result[31:0];
    if setflags then
        PSTATE.N = result[31];
        PSTATE.Z = IsZeroBit{32}(result[31:0]);
        // PSTATE.C, PSTATE.V unchanged
    end;
end;</pstext></ps>
  </ps_section>
  <timestamp>2026-03-12 12:23:09</timestamp>
  <commit_id>2025-09_rel_asl1</commit_id>
</instructionsection>
