PSSBB Physical Speculative Store Bypass Barrier Physical Speculative Store Bypass Barrier is a memory barrier that prevents speculative loads from bypassing earlier stores to the same physical address under certain conditions. For more information and details of the semantics, see Physical Speculative Store Bypass Barrier (PSSBB). It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 ) . 1 1 1 1 0 1 0 1 0 1 1 1 (1) (1) (1) (1) (1) (1) (1) (1) (0) (0) (0) (0) 0 1 0 0 0 1 0 0 PSSBB{<q>} // No additional decoding required 1 1 1 1 0 0 1 1 1 0 1 1 (1) (1) (1) (1) 1 0 (0) 0 (1) (1) (1) (1) 0 1 0 0 0 1 0 0 PSSBB{<q>} if InITBlock() then UnpredictableProcedure(); end; <q> See Standard assembler syntax fields. EncodingSpecificOperations(); SpeculativeStoreBypassBarrierToPA(); 2026-03-12 12:23:09 2025-09_rel_asl1