SSAT
Signed Saturate
Signed Saturate saturates an optionally-shifted signed value to a
selectable signed range.
This instruction sets PSTATE.Q to 1 if the
operation saturates.
For more information about the CONSTRAINED UNPREDICTABLE behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors.
It has encodings from the following instruction sets:
A32 (
A1
)
and
T32 (
T1
)
.
!= 1111
0
1
1
0
1
0
1
0
1
1
SSAT{<c>}{<q>} <Rd>, #<imm>, <Rn>, ASR #<amount>
0
SSAT{<c>}{<q>} <Rd>, #<imm>, <Rn> {, LSL #<amount>}
let d : integer = UInt(Rd);
let n : integer = UInt(Rn);
let saturate_to : integer{} = UInt(sat_imm)+1;
let (shift_t, shift_n) : (SRType, integer) = DecodeImmShift(sh::'0', imm5);
if d == 15 || n == 15 then UnpredictableProcedure(); end;
1
1
1
1
0
(0)
1
1
0
0
0
0
(0)
1
SSAT{<c>}{<q>} <Rd>, #<imm>, <Rn>, ASR #<amount>
0
SSAT{<c>}{<q>} <Rd>, #<imm>, <Rn> {, LSL #<amount>}
if sh == '1' && (imm3::imm2) == '00000' then See("SSAT16"); end;
let d : integer = UInt(Rd);
let n : integer = UInt(Rn);
let saturate_to : integer{} = UInt(sat_imm)+1;
let (shift_t, shift_n) : (SRType, integer) = DecodeImmShift(sh::'0', imm3::imm2);
// Armv8-A removes UNPREDICTABLE for R13
if d == 15 || n == 15 then UnpredictableProcedure(); end;
<c>
See Standard assembler syntax fields.
<q>
See Standard assembler syntax fields.
<Rd>
Is the general-purpose destination register, encoded in the "Rd" field.
<imm>
Is the bit position for saturation, in the range 1 to 32, encoded in the "sat_imm" field as <imm>-1.
<Rn>
Is the general-purpose source register, encoded in the "Rn" field.
<amount>
For the "A1 Arithmetic shift right" variant: is the shift amount, in the range 1 to 32 encoded in the "imm5" field as <amount> modulo 32.
<amount>
For the "A1 Logical shift left" variant: is the optional shift amount, in the range 0 to 31, defaulting to 0 and encoded in the "imm5" field.
<amount>
For the "T1 Arithmetic shift right" variant: is the shift amount, in the range 1 to 31 encoded in the "imm3:imm2" field as <amount>.
<amount>
For the "T1 Logical shift left" variant: is the optional shift amount, in the range 0 to 31, defaulting to 0 and encoded in the "imm3:imm2" field.
if ConditionPassed() then
EncodingSpecificOperations();
let operand : bits(32) = Shift{}(R(n), shift_t, shift_n, PSTATE.C); // PSTATE.C ignored
let (result, sat) : (bits(saturate_to), boolean) = SignedSatQ{saturate_to}(SInt(operand));
R(d) = SignExtend{32}(result);
if sat then
PSTATE.Q = '1';
end;
end;
2026-03-12 12:23:09
2025-09_rel_asl1