VDUP (scalar)
Duplicate vector element to vector
Duplicate vector element to vector duplicates a single element of a
vector into every element of the destination vector.
The scalar, and the destination vector elements, can be any
one of 8-bit, 16-bit, or 32-bit fields. There is no distinction
between data types.
For more information about scalars see Advanced SIMD scalars.
Depending on settings in the CPACR,
NSACR, and
HCPTR registers, and the Security
state and PE mode in which the instruction is executed, an attempt to
execute the instruction might be UNDEFINED, or
trapped to Hyp mode.
For more information see Enabling Advanced
SIMD and floating-point support.
This instruction is a data-independent-time instruction as described in About the DIT bit.
It has encodings from the following instruction sets:
A32 (
A1
)
and
T32 (
T1
)
.
1
1
1
1
0
0
1
1
1
1
1
1
1
0
0
0
0
0
VDUP{<c>}{<q>}.<size> <Dd>, <Dm[x]>
1
VDUP{<c>}{<q>}.<size> <Qd>, <Dm[x]>
if imm4 == 'x000' then Undefined(); end;
if Q == '1' && Vd[0] == '1' then Undefined(); end;
let lsb : integer{} = LowestSetBit(imm4[2:0]);
let esize : integer{} = 8 << lsb;
let index : integer = UInt(imm4[3:lsb+1]);
let d : integer = UInt(D::Vd);
let m : integer = UInt(M::Vm);
let elements : integer{} = 64 DIV esize;
let regs : integer = if Q == '0' then 1 else 2;
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
VDUP{<c>}{<q>}.<size> <Dd>, <Dm[x]>
1
VDUP{<c>}{<q>}.<size> <Qd>, <Dm[x]>
if imm4 == 'x000' then Undefined(); end;
if Q == '1' && Vd[0] == '1' then Undefined(); end;
let lsb : integer{} = LowestSetBit(imm4[2:0]);
let esize : integer{} = 8 << lsb;
let index : integer = UInt(imm4[3:lsb+1]);
let d : integer = UInt(D::Vd);
let m : integer = UInt(M::Vm);
let elements : integer{} = 64 DIV esize;
let regs : integer = if Q == '0' then 1 else 2;
<c>
For the "A1" variant: see Standard assembler syntax fields. This encoding must be unconditional.
<c>
For the "T1" variant: see Standard assembler syntax fields.
<q>
See Standard assembler syntax fields.
<size>
The data size. It must be one of:
8
Encoded as imm4<0> = '1'. imm4<3:1> encodes the index[x] of the scalar.
16
Encoded as imm4<1:0> = '10'. imm4<3:2> encodes the index [x] of the scalar.
32
Encoded as imm4<2:0> = '100'. imm4<3> encodes the index [x] of the scalar.
<Dd>
Is the 64-bit name of the SIMD&FP destination register, encoded in the "D:Vd" field.
<Dm[x]>
The scalar. For details of how [x] is encoded, see the description of <size>.
<Qd>
Is the 128-bit name of the SIMD&FP destination register, encoded in the "D:Vd" field as <Qd>*2.
if ConditionPassed() then
EncodingSpecificOperations();
CheckAdvSIMDEnabled();
let scalar : bits(esize) = D(m)[index*:esize];
for r = 0 to regs-1 do
for e = 0 to elements-1 do
D(d+r)[e*:esize] = scalar;
end;
end;
end;
2026-03-12 12:23:09
2025-09_rel_asl1