VPADD (integer)
Vector Pairwise Add (integer)
Vector Pairwise Add (integer) adds adjacent pairs of elements
of two vectors, and places the results in the destination vector.
The operands and result are doubleword vectors.
The operand and result elements must all be the same type,
and can be 8-bit, 16-bit, or 32-bit integers. There is no distinction
between signed and unsigned integers.
Depending on settings in the CPACR,
NSACR, and
HCPTR registers, and the Security
state and PE mode in which the instruction is executed, an attempt to
execute the instruction might be UNDEFINED, or
trapped to Hyp mode.
For more information see Enabling Advanced
SIMD and floating-point support.
This instruction is a data-independent-time instruction as described in About the DIT bit.
It has encodings from the following instruction sets:
A32 (
A1
)
and
T32 (
T1
)
.
1
1
1
1
0
0
1
0
0
1
0
1
1
1
VPADD{<c>}{<q>}.<dt> {<Dd>, }<Dn>, <Dm>
if size == '11' || Q == '1' then Undefined(); end;
let esize : integer{} = 8 << UInt(size);
let elements : integer = 64 DIV esize;
let d : integer = UInt(D::Vd);
let n : integer = UInt(N::Vn);
let m : integer = UInt(M::Vm);
1
1
1
0
1
1
1
1
0
1
0
1
1
1
VPADD{<c>}{<q>}.<dt> {<Dd>, }<Dn>, <Dm>
if size == '11' || Q == '1' then Undefined(); end;
let esize : integer{} = 8 << UInt(size);
let elements : integer = 64 DIV esize;
let d : integer = UInt(D::Vd);
let n : integer = UInt(N::Vn);
let m : integer = UInt(M::Vm);
<c>
For the "A1" variant: see Standard assembler syntax fields. This encoding must be unconditional.
<c>
For the "T1" variant: see Standard assembler syntax fields.
<q>
See Standard assembler syntax fields.
<dt>
Is the data type for the elements of the vectors,
size
<dt>
00
I8
01
I16
10
I32
<Dd>
Is the 64-bit name of the SIMD&FP destination register, encoded in the "D:Vd" field.
<Dn>
Is the 64-bit name of the first SIMD&FP source register, encoded in the "N:Vn" field.
<Dm>
Is the 64-bit name of the second SIMD&FP source register, encoded in the "M:Vm" field.
if ConditionPassed() then
EncodingSpecificOperations();
CheckAdvSIMDEnabled();
var dest : bits(64);
let h : integer = elements DIV 2;
for e = 0 to h-1 do
dest[e*:esize] = D(n)[(2*e)*:esize] + D(n)[(2*e+1)*:esize];
dest[(e+h)*:esize] = D(m)[(2*e)*:esize] + D(m)[(2*e+1)*:esize];
end;
D(d) = dest;
end;
2026-03-12 12:23:09
2025-09_rel_asl1