VQDMLSL
Vector Saturating Doubling Multiply Subtract Long
Vector Saturating Doubling Multiply Subtract Long multiplies
corresponding elements in two doubleword vectors, subtracts double
the products from corresponding elements of a quadword vector, and
places the results in the same quadword vector.
The second operand can be a scalar instead of a vector. For more
information about scalars see Advanced SIMD
scalars.
If any of the results overflow, they are saturated. The cumulative
saturation bit, FPSCR.QC, is set if
saturation occurs. For details see Pseudocode
details of saturation.
Depending on settings in the CPACR,
NSACR, and
HCPTR registers, and the Security
state and PE mode in which the instruction is executed, an attempt to
execute the instruction might be UNDEFINED, or
trapped to Hyp mode.
For more information see Enabling Advanced
SIMD and floating-point support.
Related encodings: See Advanced SIMD data-processing for the T32 instruction set, or Advanced SIMD data-processing for the A32 instruction set.
It has encodings from the following instruction sets:
A32 (
A1
and
A2
)
and
T32 (
T1
and
T2
)
.
1
1
1
1
0
0
1
0
1
!= 11
1
0
1
1
0
0
VQDMLSL{<c>}{<q>}.<dt> <Qd>, <Dn>, <Dm>
if size == '11' then See("Related encodings"); end;
if size == '00' || Vd[0] == '1' then Undefined(); end;
let add : boolean = (op == '0');
let scalar_form : boolean = FALSE;
let d : integer = UInt(D::Vd);
let n : integer = UInt(N::Vn);
let m : integer = UInt(M::Vm);
let esize : integer{} = 8 << UInt(size);
let elements : integer = 64 DIV esize;
let index : integer = ARBITRARY : integer;
1
1
1
1
0
0
1
0
1
!= 11
0
1
1
1
1
0
VQDMLSL{<c>}{<q>}.<dt> <Qd>, <Dn>, <Dm>[<index>]
if size == '11' then See("Related encodings"); end;
if size == '00' || Vd[0] == '1' then Undefined(); end;
let add : boolean = (op == '0');
let scalar_form : boolean = TRUE;
let d : integer = UInt(D::Vd);
let n : integer = UInt(N::Vn);
let m : integer = if size == '01' then UInt(Vm[2:0]) else UInt(Vm);
let index : integer = if size == '01' then UInt(M::Vm[3]) else UInt(M);
let esize : integer{} = 8 << UInt(size);
let elements : integer = 64 DIV esize;
1
1
1
0
1
1
1
1
1
!= 11
1
0
1
1
0
0
VQDMLSL{<c>}{<q>}.<dt> <Qd>, <Dn>, <Dm>
if size == '11' then See("Related encodings"); end;
if size == '00' || Vd[0] == '1' then Undefined(); end;
let add : boolean = (op == '0');
let scalar_form : boolean = FALSE;
let d : integer = UInt(D::Vd);
let n : integer = UInt(N::Vn);
let m : integer = UInt(M::Vm);
let esize : integer{} = 8 << UInt(size);
let elements : integer = 64 DIV esize;
let index : integer = ARBITRARY : integer;
1
1
1
0
1
1
1
1
1
!= 11
0
1
1
1
1
0
VQDMLSL{<c>}{<q>}.<dt> <Qd>, <Dn>, <Dm>[<index>]
if size == '11' then See("Related encodings"); end;
if size == '00' || Vd[0] == '1' then Undefined(); end;
let add : boolean = (op == '0');
let scalar_form : boolean = TRUE;
let d : integer = UInt(D::Vd);
let n : integer = UInt(N::Vn);
let m : integer = if size == '01' then UInt(Vm[2:0]) else UInt(Vm);
let index : integer = if size == '01' then UInt(M::Vm[3]) else UInt(M);
let esize : integer{} = 8 << UInt(size);
let elements : integer = 64 DIV esize;
<c>
For the "A1" and "A2" variants: see Standard assembler syntax fields. This encoding must be unconditional.
<c>
For the "T1" and "T2" variants: see Standard assembler syntax fields.
<q>
See Standard assembler syntax fields.
<dt>
Is the data type for the elements of the operands,
<Qd>
Is the 128-bit name of the SIMD&FP destination register, encoded in the "D:Vd" field as <Qd>*2.
<Dn>
Is the 64-bit name of the first SIMD&FP source register, encoded in the "N:Vn" field.
<Dm>
For the "A1" and "T1" variants: is the 64-bit name of the second SIMD&FP source register, encoded in the "M:Vm" field.
<Dm>
For the "A2" and "T2" variants: is the 64-bit name of the second SIMD&FP source register, encoded in the "Vm<2:0>" field when <dt> is S16, otherwise the "Vm" field.
<index>
Is the element index in the range 0 to 3, encoded in the "M:Vm<3>" field when <dt> is S16, otherwise in range 0 to 1, encoded in the "M" field.
if ConditionPassed() then
EncodingSpecificOperations();
CheckAdvSIMDEnabled();
var op2 : integer;
if scalar_form then op2 = SInt(Din(m)[index*:esize]); end;
for e = 0 to elements-1 do
if !scalar_form then op2 = SInt(Din(m)[e*:esize]); end;
let op1 : integer = SInt(Din(n)[e*:esize]);
// The following only saturates if both op1 and op2 equal -(2^(esize-1))
let (product, sat1) : (bits(2*esize), boolean) = SignedSatQ{2*esize}(2*op1*op2);
var result : integer;
if add then
result = SInt(Qin(d>>1)[e*:(2*esize)]) + SInt(product);
else
result = SInt(Qin(d>>1)[e*:(2*esize)]) - SInt(product);
end;
let (res, sat2) : (bits(2*esize), boolean) = SignedSatQ{2*esize}(result);
Q(d>>1)[e*:(2*esize)] = res;
if sat1 || sat2 then FPSCR().QC = '1'; end;
end;
end;
2026-03-12 12:23:09
2025-09_rel_asl1