This is a collection of Intel®’ IA32® Software Developer's Manuals (URL of the day) and AMD' AMD64 Architecture Programmer's Manual together with the related specifications, application notes, white papers, and change logs. The collection aims to keep all available revisions. It was originally created by Michal Necasek, see OS/2 Museum.

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BFI

Bit Field Insert copies any number of low order bits from a register into the same number of adjacent bits at any position in the destination register.

It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 ) .

A1

Decode for this encoding

if Rn == '1111' then See("BFC"); end; let d : integer = UInt(Rd); let n : integer = UInt(Rn); let msbit : integer{} = UInt(msb); let lsbit : integer{} = UInt(lsb); if d == 15 then UnpredictableProcedure(); end; if msbit < lsbit then UnpredictableProcedure(); end;

CONSTRAINED UNPREDICTABLE behavior

If msbit < lsbit, then one of the following behaviors must occur:

• The instruction is undefined.
• The instruction executes as NOP.
• The value in the destination register is unknown.

T1

Decode for this encoding

if Rn == '1111' then See("BFC"); end; let d : integer = UInt(Rd); let n : integer = UInt(Rn); let msbit : integer{} = UInt(msb); let lsbit : integer{} = UInt(imm3::imm2); // Armv8-A removes UNPREDICTABLE for R13 if d == 15 then UnpredictableProcedure(); end; if msbit < lsbit then UnpredictableProcedure(); end;

CONSTRAINED UNPREDICTABLE behavior

If msbit < lsbit, then one of the following behaviors must occur:

• The instruction is undefined.
• The instruction executes as NOP.
• The value in the destination register is unknown.

Assembler Symbols