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DCPS2 -- AArch32

DCPS2

Debug Change PE State to EL2 allows the debugger to move the PE into EL2 from a lower Exception level.

DCPS2 is UNDEFINED if any of:

When the PE executes DCPS2:

For more information on the operation of the DCPS<n> instructions, see DCPS.

T1

15141312111098765432101514131211109876543210
11110111100011111000000000000010
imm4imm10opt

Encoding

DCPS2

Decode for this encoding

if !HaveEL(EL2) then Undefined(); end;

Operation

if !Halted() || !EL2Enabled() then Undefined(); end; if ELUsingAArch32(EL2) then AArch32_WriteMode(M32_Hyp); PSTATE.E = HSCTLR().EE; ELR_hyp() = ARBITRARY : bits(32); HSR() = ARBITRARY : bits(32); SPSR_hyp() = ARBITRARY : bits(32); DLR() = ARBITRARY : bits(32); DSPSR() = ARBITRARY : bits(32); else // Targeting EL2 using AArch64 AArch64_MaybeZeroRegisterUppers(); MaybeZeroSVEUppers(EL2); PSTATE.nRW = '0'; PSTATE.SP = '1'; PSTATE.EL = EL2; if IsFeatureImplemented(FEAT_PAN) && SCTLR_EL2().SPAN == '0' && ELIsInHost(EL0) then PSTATE.PAN = '1'; end; if IsFeatureImplemented(FEAT_UAO) then PSTATE.UAO = '0'; end; ELR_EL2() = ARBITRARY : bits(64); ESR_EL2() = ARBITRARY : bits(64); SPSR_EL2() = ARBITRARY : bits(64); DLR_EL0() = ARBITRARY : bits(64); DSPSR_EL0() = ARBITRARY : bits(64); // SCTLR_EL2.IESB might be ignored in Debug state. if (IsFeatureImplemented(FEAT_IESB) && SCTLR_EL2().IESB == '1' && !ConstrainUnpredictableBool(Unpredictable_IESBinDebug)) then SynchronizeErrors(); end; end; UpdateEDSCRFields(); // Update EDSCR PE state flags


2025-09_rel_asl1 2026-03-12 12:57:38

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