This is a collection of Intel®’ IA32® Software Developer's Manuals (URL of the day) and AMD' AMD64 Architecture Programmer's Manual together with the related specifications, application notes, white papers, and change logs. The collection aims to keep all available revisions. It was originally created by Michal Necasek, see OS/2 Museum.

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LDAEXB

Load-Acquire Exclusive Byte loads a byte from memory, zero-extends it to form a 32-bit word, writes it to a register and:

• If the address has the Shared Memory attribute, marks the physical address as exclusive access for the executing PE in a global monitor.
• Causes the executing PE to indicate an active exclusive access in the local monitor.

The instruction also has memory ordering semantics as described in Load-Acquire, Store-Release.

For more information about support for shared memory see Synchronization and semaphores. For information about memory accesses see Memory accesses.

It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 ) .

A1

Decode for this encoding

let t : integer = UInt(Rt); let n : integer = UInt(Rn); if t == 15 || n == 15 then UnpredictableProcedure(); end;

T1

Decode for this encoding

let t : integer = UInt(Rt); let n : integer = UInt(Rn); if t == 15 || n == 15 then UnpredictableProcedure(); end;

Assembler Symbols