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UDF -- AArch32

UDF

Permanently Undefined generates an Undefined Instruction exception.

The encodings for UDF used in this section are defined as permanently UNDEFINED. However:

It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 and T2 ) .

A1

313029282726252423222120191817161514131211109876543210
111001111111imm121111imm4
cond

Encoding

UDF{<c>}{<q>} {#}<imm>

Decode for this encoding

let imm32 : bits(32) = ZeroExtend{}(imm12::imm4); // imm32 is for assembly and disassembly only, and is ignored by hardware.

T1

1514131211109876543210
11011110imm8
S

Encoding

UDF{<c>}{<q>} {#}<imm>

Decode for this encoding

let imm32 : bits(32) = ZeroExtend{}(imm8); // imm32 is for assembly and disassembly only, and is ignored by hardware.

T2

15141312111098765432101514131211109876543210
111101111111imm41010imm12
o1o2

Encoding

UDF{<c>}{<q>} {#}<imm>

UDF{<c>}.W {#}<imm> // (<imm> can be represented in T1)

Decode for this encoding

let imm32 : bits(32) = ZeroExtend{}(imm4::imm12); // imm32 is for assembly and disassembly only, and is ignored by hardware.

Assembler Symbols

<c>

For the "A1" variant: see Standard assembler syntax fields. <c> must be AL or omitted.

For the "T1" and "T2" variants: see Standard assembler syntax fields. Arm deprecates using any <c> value other than AL.

<q>

See Standard assembler syntax fields.

<imm>

For the "A1" variant: is a 16-bit unsigned immediate, in the range 0 to 65535, encoded in the "imm12:imm4" field. The PE ignores the value of this constant.

For the "T1" variant: is a 8-bit unsigned immediate, in the range 0 to 255, encoded in the "imm8" field. The PE ignores the value of this constant.

For the "T2" variant: is a 16-bit unsigned immediate, in the range 0 to 65535, encoded in the "imm4:imm12" field. The PE ignores the value of this constant.


2025-09_rel_asl1 2026-03-12 12:57:38

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