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UHSAX -- AArch32

UHSAX

Unsigned Halving Subtract and Add with Exchange exchanges the two halfwords of the second operand, performs one unsigned 16-bit integer subtraction and one unsigned 16-bit addition, halves the results, and writes the results to the destination register.

It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 ) .

A1

313029282726252423222120191817161514131211109876543210
!= 111101100111RnRd(1)(1)(1)(1)0101Rm
condop1Bop2

Encoding

UHSAX{<c>}{<q>} {<Rd>, }<Rn>, <Rm>

Decode for this encoding

let d : integer = UInt(Rd); let n : integer = UInt(Rn); let m : integer = UInt(Rm); if d == 15 || n == 15 || m == 15 then UnpredictableProcedure(); end;

T1

15141312111098765432101514131211109876543210
111110101110Rn1111Rd0110Rm
op1UHS

Encoding

UHSAX{<c>}{<q>} {<Rd>, }<Rn>, <Rm>

Decode for this encoding

let d : integer = UInt(Rd); let n : integer = UInt(Rn); let m : integer = UInt(Rm); // Armv8-A removes UNPREDICTABLE for R13 if d == 15 || n == 15 || m == 15 then UnpredictableProcedure(); end;

For more information about the CONSTRAINED UNPREDICTABLE behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors.

Assembler Symbols

<c>

See Standard assembler syntax fields.

<q>

See Standard assembler syntax fields.

<Rd>

Is the general-purpose destination register, encoded in the "Rd" field.

<Rn>

Is the first general-purpose source register, encoded in the "Rn" field.

<Rm>

Is the second general-purpose source register, encoded in the "Rm" field.

Operation

if ConditionPassed() then EncodingSpecificOperations(); let sum : integer = UInt(R(n)[15:0]) + UInt(R(m)[31:16]); let diff : integer = UInt(R(n)[31:16]) - UInt(R(m)[15:0]); R(d)[15:0] = sum[16:1]; R(d)[31:16] = diff[16:1]; end;

Operational information

This instruction is a data-independent-time instruction as described in About the DIT bit.


2025-09_rel_asl1 2026-03-12 12:57:38

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