<?xml version="1.0" ?><?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?><!DOCTYPE instructionsection  PUBLIC '-//ARM//DTD instructionsection //EN'  'iform-p.dtd'><!-- Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. --><!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. --><instructionsection id="PLD_l" title="PLD (literal) -- AArch32" type="instruction">
  <docvars>
    <docvar key="instr-class" value="general"/>
    <docvar key="mnemonic" value="PLD"/>
  </docvars>
  <heading>PLD (literal)</heading>
  <desc>
    <brief>
      <para>Preload Data (literal)</para>
    </brief>
    <authored>
      <para>Preload Data (literal) signals the memory system that data memory
accesses from a specified address are likely in the near future. The
memory system can respond by taking actions that are expected to
speed up the memory accesses when they do occur, such as preloading
the cache line containing the specified address into the data cache.</para>
      <para>The effect of a <instruction>PLD</instruction> instruction is
<arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word>.  For more information,
see <xref linkend="ARMARM_CEGJJFCA">Preloading caches</xref>.</para>
    </authored>
    <encodingnotes>
      <para>For more information about the <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> behavior of this instruction, see <xref linkend="ARMARM_CJAEGDJC">Architectural Constraints on UNPREDICTABLE behaviors</xref>.</para>
    </encodingnotes>
    <syntaxnotes>
      <para>The alternative syntax permits the addition or subtraction of the offset and the immediate offset to be specified separately, including permitting a subtraction of 0 that cannot be specified using the normal syntax. For more information, see <xref linkend="ARMARM_BABGCIBA">Use of labels in UAL instruction syntax</xref>.</para>
    </syntaxnotes>
  </desc>
  <alias_list howmany="0"/>
  <classes>
    <classesintro count="2">
      <txt>It has encodings from the following instruction sets:</txt>
      <txt> A32 (</txt>
      <a href="#iclass_a1">A1</a>
      <txt>)</txt>
      <txt> and </txt>
      <txt> T32 (</txt>
      <a href="#iclass_t1">T1</a>
      <txt>)</txt>
      <txt>.</txt>
    </classesintro>
    <iclass name="A1" oneof="2" id="iclass_a1" no_encodings="1" isa="A32">
      <docvars>
        <docvar key="armarmheading" value="A1"/>
        <docvar key="instr-class" value="general"/>
        <docvar key="isa" value="A32"/>
        <docvar key="mnemonic" value="PLD"/>
        <docvar key="preload-type" value="pld"/>
      </docvars>
      <iclassintro count="1"/>
      <regdiagram form="32" psname="A32.uncond_as.uncondhints.preload_imm.PLD_l_A1" tworows="1">
        <box hibit="31" width="4" settings="4">
          <c>1</c>
          <c>1</c>
          <c>1</c>
          <c>1</c>
        </box>
        <box hibit="27" width="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="26" width="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="25" width="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="24" name="D" usename="1" settings="1" psbits="x">
          <c>1</c>
        </box>
        <box hibit="23" width="1" name="U" usename="1">
          <c colspan="1"/>
        </box>
        <box hibit="22" name="R" usename="1" settings="1" psbits="x">
          <c>(1)</c>
        </box>
        <box hibit="21" width="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="20" width="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="19" width="4" name="Rn" usename="1" settings="4" psbits="xxxx">
          <c>1</c>
          <c>1</c>
          <c>1</c>
          <c>1</c>
        </box>
        <box hibit="15" width="4" settings="4">
          <c>(1)</c>
          <c>(1)</c>
          <c>(1)</c>
          <c>(1)</c>
        </box>
        <box hibit="11" width="12" name="imm12" usename="1">
          <c colspan="12"/>
        </box>
      </regdiagram>
      <encoding name="PLD_l_A1" oneofinclass="1" oneof="2" label="">
        <docvars>
          <docvar key="armarmheading" value="A1"/>
          <docvar key="instr-class" value="general"/>
          <docvar key="isa" value="A32"/>
          <docvar key="mnemonic" value="PLD"/>
          <docvar key="preload-type" value="pld"/>
        </docvars>
        <asmtemplate comment="Normal form"><text>PLD{</text><a hover="For the &quot;A1&quot; variant: see x[Standard assembler syntax fields](Babbefhf). Must be AL or omitted." link="AL_option__2">&lt;c&gt;</a><text>}{</text><a hover="See x[Standard assembler syntax fields](Babbefhf)." link="qw_option">&lt;q&gt;</a><text>}  </text><a hover="The label of the literal data item that is likely to be accessed in the near future. The assembler calculates the required value of the offset from the Align(PC, 4) value of the instruction to this label. The offset must be in the range –4095 to 4095.

If the offset is zero or positive, imm32 is equal to the offset and add == TRUE.

If the offset is negative, imm32 is equal to minus the offset and add == FALSE." link="label__17">&lt;label&gt;</a></asmtemplate>
        <asmtemplate comment="Alternative form"><text>PLD{</text><a hover="For the &quot;A1&quot; variant: see x[Standard assembler syntax fields](Babbefhf). Must be AL or omitted." link="AL_option__2">&lt;c&gt;</a><text>}{</text><a hover="See x[Standard assembler syntax fields](Babbefhf)." link="qw_option">&lt;q&gt;</a><text>}  [PC, #{</text><a hover="Specifies the offset is added to or subtracted from the base register, defaulting to + if omitted and " link="plus_or_minus_option">+/-</a><text>}</text><a hover="For the &quot;A1&quot; variant: is the 12-bit unsigned immediate byte offset, in the range 0 to 4095, encoded in the &quot;imm12&quot; field." link="imm__107">&lt;imm&gt;</a><text>]</text></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="A32.uncond_as.uncondhints.preload_imm.PLD_l_A1" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">let imm32 : bits(32) = ZeroExtend{}(imm12);
let add : boolean = (U == '1');</pstext></ps>
      </ps_section>
    </iclass>
    <iclass name="T1" oneof="2" id="iclass_t1" no_encodings="1" isa="T32">
      <docvars>
        <docvar key="address-form" value="literal"/>
        <docvar key="armarmheading" value="T1"/>
        <docvar key="instr-class" value="general"/>
        <docvar key="isa" value="T32"/>
        <docvar key="mnemonic" value="PLD"/>
      </docvars>
      <iclassintro count="1"/>
      <regdiagram form="16x2" psname="T32.w.ldst.ldlit_unsigned.PLD_l_T1" tworows="1">
        <box hibit="31" width="3" settings="3">
          <c>1</c>
          <c>1</c>
          <c>1</c>
        </box>
        <box hibit="28" width="4" settings="4">
          <c>1</c>
          <c>1</c>
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="24" width="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="23" width="1" name="U" usename="1">
          <c colspan="1"/>
        </box>
        <box hibit="22" width="2" name="size" usename="1" settings="2" psbits="xx">
          <c>0</c>
          <c>(0)</c>
        </box>
        <box hibit="20" name="L" usename="1" settings="1" psbits="x">
          <c>1</c>
        </box>
        <box hibit="19" width="4" settings="4">
          <c>1</c>
          <c>1</c>
          <c>1</c>
          <c>1</c>
        </box>
        <box hibit="15" width="4" name="Rt" usename="1" settings="4" psbits="xxxx">
          <c>1</c>
          <c>1</c>
          <c>1</c>
          <c>1</c>
        </box>
        <box hibit="11" width="12" name="imm12" usename="1">
          <c colspan="12"/>
        </box>
      </regdiagram>
      <encoding name="PLD_l_T1" oneofinclass="1" oneof="2" label="">
        <docvars>
          <docvar key="armarmheading" value="T1"/>
          <docvar key="instr-class" value="general"/>
          <docvar key="isa" value="T32"/>
          <docvar key="address-form" value="literal"/>
          <docvar key="mnemonic" value="PLD"/>
        </docvars>
        <asmtemplate comment="Preferred syntax"><text>PLD{</text><a hover="For the &quot;T1&quot; variant: see x[Standard assembler syntax fields](Babbefhf)." link="AL_option__6">&lt;c&gt;</a><text>}{</text><a hover="See x[Standard assembler syntax fields](Babbefhf)." link="qw_option">&lt;q&gt;</a><text>}  </text><a hover="The label of the literal data item that is likely to be accessed in the near future. The assembler calculates the required value of the offset from the Align(PC, 4) value of the instruction to this label. The offset must be in the range –4095 to 4095.

If the offset is zero or positive, imm32 is equal to the offset and add == TRUE.

If the offset is negative, imm32 is equal to minus the offset and add == FALSE." link="label__17">&lt;label&gt;</a></asmtemplate>
        <asmtemplate comment="Alternative syntax"><text>PLD{</text><a hover="For the &quot;T1&quot; variant: see x[Standard assembler syntax fields](Babbefhf)." link="AL_option__6">&lt;c&gt;</a><text>}{</text><a hover="See x[Standard assembler syntax fields](Babbefhf)." link="qw_option">&lt;q&gt;</a><text>}  [PC, #{</text><a hover="Specifies the offset is added to or subtracted from the base register, defaulting to + if omitted and " link="plus_or_minus_option">+/-</a><text>}</text><a hover="For the &quot;T1&quot; variant: is a 12-bit unsigned immediate byte offset, in the range 0 to 4095, encoded in the &quot;imm12&quot; field." link="imm__133">&lt;imm&gt;</a><text>]</text></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="T32.w.ldst.ldlit_unsigned.PLD_l_T1" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">let imm32 : bits(32) = ZeroExtend{}(imm12);
let add : boolean = (U == '1');</pstext></ps>
      </ps_section>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="PLD_l_A1, A1B_PLD_l_A1" symboldefcount="1">
      <symbol link="AL_option__2">&lt;c&gt;</symbol>
      <account encodedin="">
        <intro>
          <para>For the &quot;A1&quot; variant: see <xref linkend="Babbefhf">Standard assembler syntax fields</xref>. Must be <value>AL</value> or omitted.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="PLD_l_T1, T1B_PLD_l_T1" symboldefcount="2">
      <symbol link="AL_option__6">&lt;c&gt;</symbol>
      <account encodedin="">
        <intro>
          <para>For the &quot;T1&quot; variant: see <xref linkend="Babbefhf">Standard assembler syntax fields</xref>.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="PLD_l_A1, A1B_PLD_l_A1, PLD_l_T1, T1B_PLD_l_T1" symboldefcount="1">
      <symbol link="qw_option">&lt;q&gt;</symbol>
      <account encodedin="">
        <intro>
          <para>See <xref linkend="Babbefhf">Standard assembler syntax fields</xref>.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="PLD_l_A1, PLD_l_T1" symboldefcount="1">
      <symbol link="label__17">&lt;label&gt;</symbol>
      <account encodedin="imm12">
        <intro>
          <para>The label of the literal data item that is likely to be accessed in the near future. The assembler calculates the required value of the offset from the <function>Align(PC, 4)</function> value of the instruction to this label. The offset must be in the range –4095 to 4095.</para>
          <para>If the offset is zero or positive, <field>imm32</field> is equal to the offset and <field>add</field> == <enumvalue>TRUE</enumvalue>.</para>
          <para>If the offset is negative, <field>imm32</field> is equal to minus the offset and <field>add</field> == <enumvalue>FALSE</enumvalue>.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="A1B_PLD_l_A1, T1B_PLD_l_T1" symboldefcount="1">
      <symbol link="plus_or_minus_option">+/-</symbol>
      <definition encodedin="U">
        <intro>Specifies the offset is added to or subtracted from the base register, defaulting to + if omitted and </intro>
        <table class="valuetable">
          <tgroup cols="2">
            <thead>
              <row>
                <entry class="bitfield">U</entry>
                <entry class="symbol">+/-</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry class="bitfield">0</entry>
                <entry class="symbol">-</entry>
              </row>
              <row>
                <entry class="bitfield">1</entry>
                <entry class="symbol">+</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </definition>
    </explanation>
    <explanation enclist="A1B_PLD_l_A1" symboldefcount="1">
      <symbol link="imm__107">&lt;imm&gt;</symbol>
      <account encodedin="imm12">
        <intro>
          <para>For the &quot;A1&quot; variant: is the 12-bit unsigned immediate byte offset, in the range 0 to 4095, encoded in the &quot;imm12&quot; field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="T1B_PLD_l_T1" symboldefcount="2">
      <symbol link="imm__133">&lt;imm&gt;</symbol>
      <account encodedin="imm12">
        <intro>
          <para>For the &quot;T1&quot; variant: is a 12-bit unsigned immediate byte offset, in the range 0 to 4095, encoded in the &quot;imm12&quot; field.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
  <ps_section howmany="1">
    <ps name="A32.uncond_as.uncondhints.preload_imm.PLD_l_A1" sections="1" secttype="Operation">
      <pstext mayhavelinks="1" section="Execute" rep_section="execute">if <a link="func_ConditionPassed_0" file="shared_pseudocode.xml">ConditionPassed</a>() then
    EncodingSpecificOperations();
    let address : bits(32) = (if add then (AlignDownSize(<a link="func_PC32_0" file="shared_pseudocode.xml">PC32</a>(),4) + imm32)
                                 else (AlignDownSize(<a link="func_PC32_0" file="shared_pseudocode.xml">PC32</a>(),4) - imm32));
    Hint_PreloadData(address);
end;</pstext></ps>
  </ps_section>
  <timestamp>2026-03-26 20:27:25</timestamp>
  <commit_id>2026-03_rel</commit_id>
</instructionsection>