REV
Byte-Reverse Word
Byte-Reverse Word reverses the byte order in a 32-bit register.
For more information about the CONSTRAINED UNPREDICTABLE behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors.
This instruction is a data-independent-time instruction as described in About the DIT bit.
It has encodings from the following instruction sets:
A32 (
A1
)
and
T32 (
T1
and
T2
)
.
!= 1111
0
1
1
0
1
0
1
1
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
0
0
1
1
REV{<c>}{<q>} <Rd>, <Rm>
let d : integer = UInt(Rd);
let m : integer = UInt(Rm);
if d == 15 || m == 15 then UnpredictableProcedure(); end;
1
0
1
1
1
0
1
0
0
0
REV{<c>}{<q>} <Rd>, <Rm>
let d : integer = UInt(Rd);
let m : integer = UInt(Rm);
1
1
1
1
1
0
1
0
1
0
0
1
1
1
1
1
1
0
0
0
REV{<c>}{<q>} <Rd>, <Rm>
REV{<c>}.W <Rd>, <Rm>
let d : integer = UInt(Rd);
let m : integer = UInt(Rm);
let n : integer = UInt(Rn);
// Armv8-A removes UNPREDICTABLE for R13
if m != n || d == 15 || m == 15 then UnpredictableProcedure(); end;
m != n
<c>
See Standard assembler syntax fields.
<q>
See Standard assembler syntax fields.
<Rd>
Is the general-purpose destination register, encoded in the "Rd" field.
<Rm>
For the "A1" and "T1" variants: is the general-purpose source register, encoded in the "Rm" field.
<Rm>
For the "T2" variant: is the general-purpose source register, encoded in the "Rm" field. It must be encoded with an identical value in the "Rn" field.
if ConditionPassed() then
EncodingSpecificOperations();
var result : bits(32);
result[31:24] = R(m)[7:0];
result[23:16] = R(m)[15:8];
result[15:8] = R(m)[23:16];
result[7:0] = R(m)[31:24];
R(d) = result;
end;
2026-03-26 20:27:25
2026-03_rel