SMULBB, SMULBT, SMULTB, SMULTT
Signed Multiply (halfwords)
Signed
Multiply (halfwords) multiplies two signed 16-bit quantities, taken
from either the bottom or the top half of their respective source
registers. The other halves of these source registers are ignored.
The 32-bit product is written to the destination register. No overflow
is possible during this instruction.
For more information about the CONSTRAINED UNPREDICTABLE behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors.
This instruction is a data-independent-time instruction as described in About the DIT bit.
It has encodings from the following instruction sets:
A32 (
A1
)
and
T32 (
T1
)
.
!= 1111
0
0
0
1
0
1
1
0
(0)
(0)
(0)
(0)
1
0
0
0
SMULBB{<c>}{<q>} {<Rd>, }<Rn>, <Rm>
1
0
SMULBT{<c>}{<q>} {<Rd>, }<Rn>, <Rm>
0
1
SMULTB{<c>}{<q>} {<Rd>, }<Rn>, <Rm>
1
1
SMULTT{<c>}{<q>} {<Rd>, }<Rn>, <Rm>
let d : integer = UInt(Rd);
let n : integer = UInt(Rn);
let m : integer = UInt(Rm);
let n_index : integer = UInt(N);
let m_index : integer = UInt(M);
if d == 15 || n == 15 || m == 15 then UnpredictableProcedure(); end;
1
1
1
1
1
0
1
1
0
0
0
1
1
1
1
1
0
0
0
0
SMULBB{<c>}{<q>} {<Rd>, }<Rn>, <Rm>
0
1
SMULBT{<c>}{<q>} {<Rd>, }<Rn>, <Rm>
1
0
SMULTB{<c>}{<q>} {<Rd>, }<Rn>, <Rm>
1
1
SMULTT{<c>}{<q>} {<Rd>, }<Rn>, <Rm>
let d : integer = UInt(Rd);
let n : integer = UInt(Rn);
let m : integer = UInt(Rm);
let n_index : integer = UInt(N);
let m_index : integer = UInt(M);
// Armv8-A removes UNPREDICTABLE for R13
if d == 15 || n == 15 || m == 15 then UnpredictableProcedure(); end;
<c>
See Standard assembler syntax fields.
<q>
See Standard assembler syntax fields.
<Rd>
Is the general-purpose destination register, encoded in the "Rd" field.
<Rn>
Is the first general-purpose source register holding the multiplicand in the bottom or top half (selected by <x>), encoded in the "Rn" field.
<Rm>
Is the second general-purpose source register holding the multiplier in the bottom or top half (selected by <y>), encoded in the "Rm" field.
if ConditionPassed() then
EncodingSpecificOperations();
let operand1 : bits(16) = R(n)[n_index*:16];
let operand2 : bits(16) = R(m)[m_index*:16];
let result : integer = SInt(operand1) * SInt(operand2);
R(d) = result[31:0];
// Signed overflow cannot occur
end;
2026-03-26 20:27:25
2026-03_rel